- 25 6月, 2021 1 次提交
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由 Jean-Philippe Brucker 提交于
The ACPI Virtual I/O Translation Table describes topology of para-virtual platforms, similarly to vendor tables DMAR, IVRS and IORT. For now it describes the relation between virtio-iommu and the endpoints it manages. Three steps are needed to configure DMA of endpoints: (1) acpi_viot_init(): parse the VIOT table, find or create the fwnode associated to each vIOMMU device. This needs to happen after acpi_scan_init(), because it relies on the struct device and their fwnode to be available. (2) When probing the vIOMMU device, the driver registers its IOMMU ops within the IOMMU subsystem. This step doesn't require any intervention from the VIOT driver. (3) viot_iommu_configure(): before binding the endpoint to a driver, find the associated IOMMU ops. Register them, along with the endpoint ID, into the device's iommu_fwspec. If step (3) happens before step (2), it is deferred until the IOMMU is initialized, then retried. Tested-by: NEric Auger <eric.auger@redhat.com> Reviewed-by: NEric Auger <eric.auger@redhat.com> Signed-off-by: NJean-Philippe Brucker <jean-philippe@linaro.org> Acked-by: NRafael J. Wysocki <rafael@kernel.org> Link: https://lore.kernel.org/r/20210618152059.1194210-4-jean-philippe@linaro.orgSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 07 4月, 2021 2 次提交
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由 Yong Wu 提交于
The IOMMU in many SoC depends on the MM clocks and power-domain which are device_initcall normally, thus the subsys_init here is not helpful. This patch switches it to module_platform_driver which also allow the driver built as module. Correspondingly switch the config to tristate, and update the iommu_ops's owner. Signed-off-by: NYong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210326032337.24578-2-yong.wu@mediatek.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Yong Wu 提交于
This patch only adds support for building the IOMMU-v1 driver as module. Correspondingly switch the config to tristate and update the iommu_ops's owner to THIS_MODULE. Signed-off-by: NYong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20210326032337.24578-1-yong.wu@mediatek.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 18 3月, 2021 1 次提交
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由 Chunyan Zhang 提交于
This IOMMU module can be used by Unisoc's multimedia devices, such as display, Image codec(jpeg) and a few signal processors, including VSP(video), GSP(graphic), ISP(image), and CPP(camera pixel processor), etc. Signed-off-by: NChunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lore.kernel.org/r/20210305093216.201897-3-zhang.lyra@gmail.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 23 11月, 2020 3 次提交
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由 Jean-Philippe Brucker 提交于
The sva_bind() function allows devices to access process address spaces using a PASID (aka SSID). (1) bind() allocates or gets an existing MMU notifier tied to the (domain, mm) pair. Each mm gets one PASID. (2) Any change to the address space calls invalidate_range() which sends ATC invalidations (in a subsequent patch). (3) When the process address space dies, the release() notifier disables the CD to allow reclaiming the page tables. Since release() has to be light we do not instruct device drivers to stop DMA here, we just ignore incoming page faults from this point onwards. To avoid any event 0x0a print (C_BAD_CD) we disable translation without clearing CD.V. PCIe Translation Requests and Page Requests are silently denied. Don't clear the R bit because the S bit can't be cleared when STALL_MODEL==0b10 (forced), and clearing R without clearing S is useless. Faulting transactions will stall and will be aborted by the IOPF handler. (4) After stopping DMA, the device driver releases the bond by calling unbind(). We release the MMU notifier, free the PASID and the bond. Three structures keep track of bonds: * arm_smmu_bond: one per {device, mm} pair, the handle returned to the device driver for a bind() request. * arm_smmu_mmu_notifier: one per {domain, mm} pair, deals with ATS/TLB invalidations and clearing the context descriptor on mm exit. * arm_smmu_ctx_desc: one per mm, holds the pinned ASID and pgd. Signed-off-by: NJean-Philippe Brucker <jean-philippe@linaro.org> Link: https://lore.kernel.org/r/20201106155048.997886-4-jean-philippe@linaro.orgSigned-off-by: NWill Deacon <will@kernel.org>
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由 Jean-Philippe Brucker 提交于
Let IOMMU drivers allocate a single PASID per mm. Store the mm in the IOASID set to allow refcounting and searching mm by PASID, when handling an I/O page fault. Signed-off-by: NJean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: NLu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20201106155048.997886-3-jean-philippe@linaro.orgSigned-off-by: NWill Deacon <will@kernel.org>
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由 Linus Walleij 提交于
This reverts commit d0511b54. After some time it was noticed that the Tegra186 among others were experiencing problems when making this into a module. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 10 11月, 2020 1 次提交
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由 John Stultz 提交于
Allow the qcom_scm driver to be loadable as a permenent module. This still uses the "depends on QCOM_SCM || !QCOM_SCM" bit to ensure that drivers that call into the qcom_scm driver are also built as modules. While not ideal in some cases its the only safe way I can find to avoid build errors without having those drivers select QCOM_SCM and have to force it on (as QCOM_SCM=n can be valid for those drivers). Signed-off-by: NJohn Stultz <john.stultz@linaro.org> Reviewed-by: NBjorn Andersson <bjorn.andersson@linaro.org> Acked-by: NKalle Valo <kvalo@codeaurora.org> Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <maz@kernel.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: Kalle Valo <kvalo@codeaurora.org> Cc: Maulik Shah <mkshah@codeaurora.org> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Saravana Kannan <saravanak@google.com> Cc: Todd Kjos <tkjos@google.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-arm-msm@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: linux-gpio@vger.kernel.org Link: https://lore.kernel.org/r/20201106042710.55979-3-john.stultz@linaro.orgSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 9月, 2020 1 次提交
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由 Jean-Philippe Brucker 提交于
With Shared Virtual Addressing (SVA), we need to mirror CPU TTBR, TCR, MAIR and ASIDs in SMMU contexts. Each SMMU has a single ASID space split into two sets, shared and private. Shared ASIDs correspond to those obtained from the arch ASID allocator, and private ASIDs are used for "classic" map/unmap DMA. A possible conflict happens when trying to use a shared ASID that has already been allocated for private use by the SMMU driver. This will be addressed in a later patch by replacing the private ASID. At the moment we return -EBUSY. Each mm_struct shared with the SMMU will have a single context descriptor. Add a refcount to keep track of this. It will be protected by the global SVA lock. Introduce a new arm-smmu-v3-sva.c file and the CONFIG_ARM_SMMU_V3_SVA option to let users opt in SVA support. Signed-off-by: NJean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: NJonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20200918101852.582559-9-jean-philippe@linaro.orgSigned-off-by: NWill Deacon <will@kernel.org>
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- 18 9月, 2020 1 次提交
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由 Lad Prabhakar 提交于
ipmmu-vmsa driver is also used on Renesas RZ/G{1,2} Soc's, update the same to reflect the help description for IPMMU_VMSA config. Signed-off-by: NLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: NChris Paterson <Chris.Paterson2@renesas.com> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200911101912.20701-1-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 29 7月, 2020 2 次提交
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由 Jerry Snitselaar 提交于
Move AMD Kconfig and Makefile bits down into the amd directory with the rest of the AMD specific files. Signed-off-by: NJerry Snitselaar <jsnitsel@redhat.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Link: https://lore.kernel.org/r/20200630200636.48600-3-jsnitsel@redhat.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Jerry Snitselaar 提交于
Move Intel Kconfig and Makefile bits down into intel directory with the rest of the Intel specific files. Signed-off-by: NJerry Snitselaar <jsnitsel@redhat.com> Reviewed-by: NLu Baolu <baolu.lu@linux.intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20200630200636.48600-2-jsnitsel@redhat.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 19 7月, 2020 1 次提交
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由 Christoph Hellwig 提交于
Avoid the overhead of the dma ops support for tiny builds that only use the direct mapping. Signed-off-by: NChristoph Hellwig <hch@lst.de> Tested-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
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- 10 7月, 2020 2 次提交
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由 Robin Murphy 提交于
This driver shouldn't need anything architecture-specific (that isn't under CONFIG_ARM protection already), and has already been accessible from certain x86 configurations by virtue of the previously-cleaned-up "ARM || IOMMU_DMA" dependency. Allow COMPILE_TEST for all architectures. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/1fe2006aa98f008a2e689adba6e8c96e9197f903.1593791968.git.robin.murphy@arm.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Robin Murphy 提交于
Wacky COMPILE_TEST dependencies based on who used to define dev_archdata.iommu can go. Dependencies on ARM or ARM64 already implied by the ARCH_* platform selection can go. The entire IOMMU_SUPPORT menu already depends on MMU, so those can go. IOMMU_DMA is for the architecture's DMA API implementation to choose, and its interface to IOMMU drivers is properly stubbed out if disabled, so dependencies on or selections of that can go (AMD_IOMMU is the current exception since the x86 drivers have to provide their own entire dma_map_ops implementation). Since commit ed6ccf10 ("dma-mapping: properly stub out the DMA API for !CONFIG_HAS_DMA"), drivers which simply use the dma-mapping API should not need to depend on HAS_DMA, so those can go. And a long-dead option for code removed from the MSM driver 4 years ago can also go. Signed-off-by: NRobin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/7fb9c74dc6bd12a4619ca44c92408e91352f1be0.1593791968.git.robin.murphy@arm.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 30 6月, 2020 1 次提交
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由 Geert Uytterhoeven 提交于
If NO_DMA=y (e.g. Sun-3 all{mod,yes}-config): drivers/iommu/dma-iommu.o: In function `iommu_dma_mmap': dma-iommu.c:(.text+0x92e): undefined reference to `dma_pgprot' IOMMU_DMA must not be selected, unless HAS_DMA=y. Hence fix this by making SUN50I_IOMMU depend on HAS_DMA. Fixes: 4100b8c2 ("iommu: Add Allwinner H6 IOMMU driver") Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Acked-by: NMaxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20200629121146.24011-1-geert@linux-m68k.orgSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 23 6月, 2020 1 次提交
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由 Lu Baolu 提交于
Current Intel SVM is designed by setting the pgd_t of the processor page table to FLPTR field of the PASID entry. The first level translation only supports 4 and 5 level paging structures, hence it's infeasible for the IOMMU to share a processor's page table when it's running in 32-bit mode. Let's disable 32bit support for now and claim support only when all the missing pieces are ready in the future. Fixes: 1c4f88b7 ("iommu/vt-d: Shared virtual address in scalable mode") Suggested-by: NJoerg Roedel <jroedel@suse.de> Signed-off-by: NLu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20200622231345.29722-2-baolu.lu@linux.intel.comSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 14 6月, 2020 1 次提交
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由 Masahiro Yamada 提交于
Since commit 84af7a61 ("checkpatch: kconfig: prefer 'help' over '---help---'"), the number of '---help---' has been gradually decreasing, but there are still more than 2400 instances. This commit finishes the conversion. While I touched the lines, I also fixed the indentation. There are a variety of indentation styles found. a) 4 spaces + '---help---' b) 7 spaces + '---help---' c) 8 spaces + '---help---' d) 1 space + 1 tab + '---help---' e) 1 tab + '---help---' (correct indentation) f) 1 tab + 1 space + '---help---' g) 1 tab + 2 spaces + '---help---' In order to convert all of them to 1 tab + 'help', I ran the following commend: $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/' Signed-off-by: NMasahiro Yamada <masahiroy@kernel.org>
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- 14 5月, 2020 1 次提交
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由 Maxime Ripard 提交于
The Allwinner H6 has introduced an IOMMU for a few DMA controllers, mostly video related: the display engine, the video decoders / encoders, the camera capture controller, etc. The design is pretty simple compared to other IOMMUs found in SoCs: there's a single instance, controlling all the masters, with a single address space. It also features a performance monitoring unit that allows to retrieve various informations (per-master and global TLB accesses, hits and misses, access latency, etc) that isn't supported at the moment. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/d122a8670361e36fc26b4ce2674a2223d30dc4cc.1589378833.git-series.maxime@cerno.techSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 29 4月, 2020 2 次提交
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由 Krzysztof Kozlowski 提交于
Although SPAPR_TCE_IOMMU itself can be compile tested on certain PowerPC configurations, its presence makes arch/powerpc/kvm/Makefile to select modules which do not build in such configuration. The arch/powerpc/kvm/ modules use kvm_arch.spapr_tce_tables which exists only with CONFIG_PPC_BOOK3S_64. However these modules are selected when COMPILE_TEST and SPAPR_TCE_IOMMU are chosen leading to build failures: In file included from arch/powerpc/include/asm/book3s/64/mmu-hash.h:20:0, from arch/powerpc/kvm/book3s_64_vio_hv.c:22: arch/powerpc/include/asm/book3s/64/pgtable.h:17:0: error: "_PAGE_EXEC" redefined [-Werror] #define _PAGE_EXEC 0x00001 /* execute permission */ In file included from arch/powerpc/include/asm/book3s/32/pgtable.h:8:0, from arch/powerpc/include/asm/book3s/pgtable.h:8, from arch/powerpc/include/asm/pgtable.h:18, from include/linux/mm.h:95, from arch/powerpc/include/asm/io.h:29, from include/linux/io.h:13, from include/linux/irq.h:20, from arch/powerpc/include/asm/hardirq.h:6, from include/linux/hardirq.h:9, from include/linux/kvm_host.h:7, from arch/powerpc/kvm/book3s_64_vio_hv.c:12: arch/powerpc/include/asm/book3s/32/hash.h:29:0: note: this is the location of the previous definition #define _PAGE_EXEC 0x200 /* software: exec allowed */ Fixes: e93a1695 ("iommu: Enable compile testing for some of drivers") Reported-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200414142630.21153-1-krzk@kernel.orgSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Geert Uytterhoeven 提交于
If NO_DMA=y (e.g. Sun-3 all{mod,yes}-config): drivers/iommu/dma-iommu.o: In function `iommu_dma_mmap': dma-iommu.c:(.text+0x836): undefined reference to `dma_pgprot' IOMMU_DMA must not be selected, unless HAS_DMA=y. Hence fix this by making MTK_IOMMU depend on HAS_DMA. While at it, remove the dependency on ARM || ARM64, as that is already implied by the dependency on ARCH_MEDIATEK. Fixes: e93a1695 ("iommu: Enable compile testing for some of drivers") Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/20200410143047.19691-1-geert@linux-m68k.orgSigned-off-by: NJoerg Roedel <jroedel@suse.de>
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- 27 3月, 2020 1 次提交
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由 Jacob Pan 提交于
IOASID code is needed by VT-d scalable mode for PASID allocation. Add explicit dependency such that IOASID is built-in whenever Intel IOMMU is enabled. Otherwise, aux domain code will fail when IOMMU is built-in and IOASID is compiled as a module. Fixes: 59a62337 ("iommu/vt-d: Replace Intel specific PASID allocator with IOASID") Signed-off-by: NJacob Pan <jacob.jun.pan@linux.intel.com> Acked-by: NLu Baolu <baolu.lu@linux.intel.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 04 3月, 2020 1 次提交
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由 Krzysztof Kozlowski 提交于
Some of the IOMMU drivers can be compile tested to increase build coverage. The OMAP, Rockchip and Exynos drivers use device.dev_archdata.iommu field which does not exist on all platforms. The sPAPR TCE and ARM SMMU have also restrictions where they can be built. Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 28 2月, 2020 1 次提交
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由 Jean-Philippe Brucker 提交于
Now that the infrastructure changes are in place, enable virtio-iommu to be built as a module. Remove the redundant pci_request_acs() call, since it's not exported but is already invoked during DMA setup. Signed-off-by: NJean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 07 1月, 2020 2 次提交
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由 Jacob Pan 提交于
Make use of generic IOASID code to manage PASID allocation, free, and lookup. Replace Intel specific code. Signed-off-by: NJacob Pan <jacob.jun.pan@linux.intel.com> Reviewed-by: NEric Auger <eric.auger@redhat.com> Signed-off-by: NLu Baolu <baolu.lu@linux.intel.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Lu Baolu 提交于
This adds Kconfig option INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON to make it easier for distributions to enable or disable the Intel IOMMU scalable mode by default during kernel build. Signed-off-by: NLu Baolu <baolu.lu@linux.intel.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 23 12月, 2019 3 次提交
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由 Krzysztof Kozlowski 提交于
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Will Deacon 提交于
By conditionally dropping support for the legacy binding and exporting the newly introduced 'arm_smmu_impl_init()' function we can allow the ARM SMMU driver to be built as a module. Signed-off-by: NWill Deacon <will@kernel.org> Tested-by: John Garry <john.garry@huawei.com> # smmu v3 Reviewed-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Will Deacon 提交于
By removing the redundant call to 'pci_request_acs()' we can allow the ARM SMMUv3 driver to be built as a module. Signed-off-by: NWill Deacon <will@kernel.org> Tested-by: John Garry <john.garry@huawei.com> # smmu v3 Reviewed-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 22 11月, 2019 1 次提交
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由 Boqun Feng 提交于
Currently hyperv-iommu is implemented in a x86 specific way, for example, apic is used. So make the HYPERV_IOMMU Kconfig depend on X86 as a preparation for enabling HyperV on architecture other than x86. Cc: Lan Tianyu <Tianyu.Lan@microsoft.com> Cc: Michael Kelley <mikelley@microsoft.com> Cc: linux-hyperv@vger.kernel.org Signed-off-by: NBoqun Feng (Microsoft) <boqun.feng@gmail.com> Signed-off-by: NSasha Levin <sashal@kernel.org>
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- 16 10月, 2019 1 次提交
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由 Bjorn Helgaas 提交于
Previously intel-iommu.c depended on CONFIG_AMD_IOMMU in an undesirable way. When CONFIG_INTEL_IOMMU_SVM=y, iommu_enable_dev_iotlb() calls PRI interfaces (pci_reset_pri() and pci_enable_pri()), but those are only implemented when CONFIG_PCI_PRI is enabled. The INTEL_IOMMU_SVM Kconfig did nothing with PCI_PRI, but AMD_IOMMU selects PCI_PRI. So if AMD_IOMMU was enabled, intel-iommu.c got the full PRI interfaces, but if AMD_IOMMU was not enabled, it got the PRI stubs. Make the iommu_enable_dev_iotlb() behavior independent of AMD_IOMMU by having INTEL_IOMMU_SVM select PCI_PRI so iommu_enable_dev_iotlb() always uses the full implementations of PRI interfaces. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NKuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: NJerry Snitselaar <jsnitsel@redhat.com> Reviewed-by: NJoerg Roedel <jroedel@suse.de> Acked-by: NJoerg Roedel <jroedel@suse.de>
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- 15 10月, 2019 2 次提交
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由 Jean-Philippe Brucker 提交于
Some devices might support multiple DMA address spaces, in particular those that have the PCI PASID feature. PASID (Process Address Space ID) allows to share process address spaces with devices (SVA), partition a device into VM-assignable entities (VFIO mdev) or simply provide multiple DMA address space to kernel drivers. Add a global PASID allocator usable by different drivers at the same time. Name it I/O ASID to avoid confusion with ASIDs allocated by arch code, which are usually a separate ID space. The IOASID space is global. Each device can have its own PASID space, but by convention the IOMMU ended up having a global PASID space, so that with SVA, each mm_struct is associated to a single PASID. The allocator is primarily used by IOMMU subsystem but in rare occasions drivers would like to allocate PASIDs for devices that aren't managed by an IOMMU, using the same ID space as IOMMU. Signed-off-by: NJean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: NJacob Pan <jacob.jun.pan@linux.intel.com> Reviewed-by: NJean-Philippe Brucker <jean-philippe@linaro.org> Reviewed-by: NEric Auger <eric.auger@redhat.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Tom Murphy 提交于
Convert the AMD iommu driver to the dma-iommu api. Remove the iova handling and reserve region code from the AMD iommu driver. Signed-off-by: NTom Murphy <murphyt7@tcd.ie> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 11 9月, 2019 1 次提交
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由 Lu Baolu 提交于
The bounce page implementation depends on swiotlb. Hence, don't switch off swiotlb if the system has untrusted devices or could potentially be hot-added with any untrusted devices. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Kevin Tian <kevin.tian@intel.com> Signed-off-by: NLu Baolu <baolu.lu@linux.intel.com> Reviewed-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 17 8月, 2019 1 次提交
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由 Christoph Hellwig 提交于
The only thing remaining of the machvecs is a few checks if we are running on an SGI UV system. Replace those with the existing is_uv_system() check that has been rewritten to simply check the OEM ID directly. That leaves us with a generic kernel that is as fast as the previous DIG/ZX1/UV kernels, but can support all hardware. Support for UV and the HP SBA IOMMU is now optional based on new config options. Signed-off-by: NChristoph Hellwig <hch@lst.de> Link: https://lkml.kernel.org/r/20190813072514.23299-27-hch@lst.deSigned-off-by: NTony Luck <tony.luck@intel.com>
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- 07 6月, 2019 1 次提交
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由 Jean-Philippe Brucker 提交于
The virtio IOMMU is a para-virtualized device, allowing to send IOMMU requests such as map/unmap over virtio transport without emulating page tables. This implementation handles ATTACH, DETACH, MAP and UNMAP requests. The bulk of the code transforms calls coming from the IOMMU API into corresponding virtio requests. Mappings are kept in an interval tree instead of page tables. A little more work is required for modular and x86 support, so for the moment the driver depends on CONFIG_VIRTIO=y and CONFIG_ARM64. Tested-by: NBharat Bhushan <bharat.bhushan@nxp.com> Tested-by: NEric Auger <eric.auger@redhat.com> Reviewed-by: NEric Auger <eric.auger@redhat.com> Signed-off-by: NJean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 27 5月, 2019 2 次提交
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由 Christoph Hellwig 提交于
For entirely dma coherent architectures there is no requirement to ever remap dma coherent allocation. Move all the remap and pool code under IS_ENABLED() checks and drop the Kconfig dependency. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reviewed-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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由 Christoph Hellwig 提交于
There is nothing really arm64 specific in the iommu_dma_ops implementation, so move it to dma-iommu.c and keep a lot of symbols self-contained. Note the implementation does depend on the DMA_DIRECT_REMAP infrastructure for now, so we'll have to make the DMA_IOMMU support depend on it, but this will be relaxed soon. Signed-off-by: NChristoph Hellwig <hch@lst.de> Acked-by: NRobin Murphy <robin.murphy@arm.com> Signed-off-by: NJoerg Roedel <jroedel@suse.de>
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- 21 5月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 03 5月, 2019 1 次提交
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由 Julien Grall 提交于
On RT, iommu_dma_map_msi_msg() may be called from non-preemptible context. This will lead to a splat with CONFIG_DEBUG_ATOMIC_SLEEP as the function is using spin_lock (they can sleep on RT). iommu_dma_map_msi_msg() is used to map the MSI page in the IOMMU PT and update the MSI message with the IOVA. Only the part to lookup for the MSI page requires to be called in preemptible context. As the MSI page cannot change over the lifecycle of the MSI interrupt, the lookup can be cached and re-used later on. iomma_dma_map_msi_msg() is now split in two functions: - iommu_dma_prepare_msi(): This function will prepare the mapping in the IOMMU and store the cookie in the structure msi_desc. This function should be called in preemptible context. - iommu_dma_compose_msi_msg(): This function will update the MSI message with the IOVA when the device is behind an IOMMU. Signed-off-by: NJulien Grall <julien.grall@arm.com> Reviewed-by: NRobin Murphy <robin.murphy@arm.com> Reviewed-by: NEric Auger <eric.auger@redhat.com> Acked-by: NJoerg Roedel <jroedel@suse.de> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
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