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  1. 29 6月, 2007 2 次提交
  3. 25 6月, 2007 1 次提交
    • G
      [POWERPC] Don't link timer.o for powerpc systems using generic rtc · 1a06e0fe
      由 Guennadi Liakhovetski 提交于 
      With both generic rtc and powerpc timer suspend / resume code now in the
(powerpc.git) tree, powerpc platforms using the generic timer and enabling
power management will have timer.o linked in the kernel, which they don't
need. Moreover, it will likely WARN_ON(!ppc_md.get_rtc_time), save
zero-time and return no error on suspend...

As a possible solution we can choose not to build timer.o when RTC_CLASS
is enabled.  However, I can imagine systems with 2 rtc's, one served by the
ppc-rtc, another one generic built as a module, in which case using the
ppc-rtc for suspend / resume will be impossible.  Not to say, that such a
configuration would be ugly...
Signed-off-by: NG. Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      1a06e0fe
  5. 12 5月, 2007 3 次提交
  7. 08 5月, 2007 3 次提交
    • D
      [POWERPC] Abolish powerpc_flash_init() · 197686df
      由 David Gibson 提交于 
      powerpc_flash_init() implements a broken way of probing for flash
devices supported by the physmap_of driver.  It finds all nodes in the
device tree with device_type=="rom" and instantiates of_platform
devices for them.  This is fundamentally incompatible with the normal
and correct way of probing for of_platform_bus_probe().  Platforms
which relied on powerpc_flash_init()s behaviour (none are in-tree)
will have to update their platform probing code to correctly probe
busses containing flash devices.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      197686df
    • M
      [POWERPC] MPIC U3/U4 MSI backend · 05af7bd2
      由 Michael Ellerman 提交于 
      MPIC U3/U4 MSI backend. Based on code from Segher, heavily hacked by me.
This only deals with MSI on U3/U4 MPICs, aka. CPC 9x5.

If we find a U3/U4 then we enable this backend, ie. take over the ppc_md
MSI hooks. We might need more elaborate logic in future to decide which
backend is enabled.

We need our own irq_chip so that we can do MSI masking/unmasking on
the device itself. We also need to mask explicitly on shutdown to make
sure we don't get bitten by lazy-disable semantics.
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      05af7bd2
    • M
      [POWERPC] MPIC MSI allocator · a7de7c74
      由 Michael Ellerman 提交于 
      To support MSI on MPIC we need a way to reserve and allocate hardware irq
numbers, this patch implements an allocator for that purpose.

New firmware platforms must define a "msi-available-ranges" property on their
MPIC node for MSI to work. For U3/U4 we do a best-guess setup.
Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      a7de7c74
  9. 24 4月, 2007 1 次提交
  11. 27 3月, 2007 1 次提交
  13. 26 3月, 2007 1 次提交
  15. 16 2月, 2007 1 次提交
  17. 07 2月, 2007 1 次提交
  19. 09 1月, 2007 1 次提交
  21. 11 12月, 2006 1 次提交
  23. 04 12月, 2006 4 次提交
  25. 13 11月, 2006 1 次提交
  27. 16 10月, 2006 1 次提交
  29. 04 10月, 2006 1 次提交
    • L
      [POWERPC] Add QUICC Engine (QE) infrastructure · 98658538
      由 Li Yang 提交于 
      Add QUICC Engine (QE) configuration, header files, and
QE management and library code that are used by QE devices
drivers.

Includes Leo's modifications up to, and including, the
platform_device to of_device adaptation:

"The series of patches add generic QE infrastructure called
qe_lib, and MPC8360EMDS board support.  Qe_lib is used by
QE device drivers such as ucc_geth driver.

This version updates QE interrupt controller to use new irq
mapping mechanism, addresses all the comments received with
last submission and includes some style fixes.

v2: Change to use device tree for BCSR and MURAM;
Remove I/O port interrupt handling code as it is not generic
enough.

v3: Address comments from Kumar;  Update definition of several
device tree nodes;  Copyright style change."

In addition, the following changes have been made:

o removed typedefs
o uint -> u32 conversions
o removed following defines:
  QE_SIZEOF_BD, BD_BUFFER_ARG, BD_BUFFER_CLEAR, BD_BUFFER,
  BD_STATUS_AND_LENGTH_SET, BD_STATUS_AND_LENGTH, and BD_BUFFER_SET
  because they hid sizeof/in_be32/out_be32 operations from the reader.
o fixed qe_snums_init() serial num assignment to use a const array
o made CONFIG_UCC_FAST select UCC_SLOW
o reduced NR_QE_IC_INTS from 128 to 64
o remove _IO_BASE, etc. defines (not used)
o removed irrelevant comments, added others to resemble removed BD_ defines
o realigned struct definitions in headers
o various other style fixes including things like pinMask -> pin_mask
o fixed a ton of whitespace issues
o marked ioregs as __be32/__be16
o removed platform_device code and redundant get_qe_base()
o removed redundant comments
o added cpu_relax() to qe_reset
o uncasted all get_property() assignments
o eliminated unneeded casts
o eliminated immrbar_phys_to_virt (not used)
Signed-off-by: NLi Yang <leoli@freescale.com>
Signed-off-by: NShlomi Gridish <gridish@freescale.com>
Signed-off-by: NKim Phillips <kim.phillips@freescale.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      98658538
  31. 22 9月, 2006 1 次提交
  33. 30 8月, 2006 1 次提交
  35. 03 7月, 2006 1 次提交
  37. 29 6月, 2006 2 次提交
  39. 15 6月, 2006 1 次提交
  41. 14 1月, 2006 1 次提交
  43. 11 1月, 2006 1 次提交
  45. 09 1月, 2006 2 次提交
  47. 01 11月, 2005 1 次提交
  49. 28 10月, 2005 1 次提交
  51. 27 10月, 2005 1 次提交
  53. 26 10月, 2005 3 次提交
  55. 10 10月, 2005 1 次提交