1. 31 7月, 2016 2 次提交
  2. 28 6月, 2016 5 次提交
  3. 24 6月, 2016 1 次提交
  4. 18 6月, 2016 1 次提交
    • I
      net: ethernet: ti: cpsw: remove rx_descs property · 1793331e
      Ivan Khoronzhuk 提交于
      There is no reason in rx_descs property because davinici_cpdma
      driver splits pool of descriptors equally between tx and rx channels.
      That is, if number of descriptors 256, 128 of them are for rx
      channels. While receiving, the descriptor is freed to the pool and
      then allocated with new skb. And if in DT the "rx_descs" is set to
      64, then 128 - 64 = 64 descriptors are always in the pool and cannot
      be used, for tx, for instance. It's not correct resource usage,
      better to set it to half of pool, then the rx pool can be used in
      full. It will not have any impact on performance, as anyway, the
      "redundant" descriptors were unused.
      Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@linaro.org>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1793331e
  5. 13 6月, 2016 1 次提交
  6. 04 6月, 2016 2 次提交
  7. 05 5月, 2016 1 次提交
  8. 29 4月, 2016 4 次提交
  9. 22 4月, 2016 1 次提交
  10. 21 4月, 2016 1 次提交
  11. 16 4月, 2016 1 次提交
    • A
      cpsw: Prevent NUll pointer dereference with two PHYs · cfe25560
      Andrew Goodbody 提交于
      Adding a 2nd PHY to cpsw results in a NULL pointer dereference
      as below. Fix by maintaining a reference to each PHY node in slave
      struct instead of a single reference in the priv struct which was
      overwritten by the 2nd PHY.
      
      [   17.870933] Unable to handle kernel NULL pointer dereference at virtual address 00000180
      [   17.879557] pgd = dc8bc000
      [   17.882514] [00000180] *pgd=9c882831, *pte=00000000, *ppte=00000000
      [   17.889213] Internal error: Oops: 17 [#1] ARM
      [   17.893838] Modules linked in:
      [   17.897102] CPU: 0 PID: 1657 Comm: connmand Not tainted 4.5.0-ge463dfb-dirty #11
      [   17.904947] Hardware name: Cambrionix whippet
      [   17.909576] task: dc859240 ti: dc968000 task.ti: dc968000
      [   17.915339] PC is at phy_attached_print+0x18/0x8c
      [   17.920339] LR is at phy_attached_info+0x14/0x18
      [   17.925247] pc : [<c042baec>]    lr : [<c042bb74>]    psr: 600f0113
      [   17.925247] sp : dc969cf8  ip : dc969d28  fp : dc969d18
      [   17.937425] r10: dda7a400  r9 : 00000000  r8 : 00000000
      [   17.942971] r7 : 00000001  r6 : ddb00480  r5 : ddb8cb34  r4 : 00000000
      [   17.949898] r3 : c0954cc0  r2 : c09562b0  r1 : 00000000  r0 : 00000000
      [   17.956829] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
      [   17.964401] Control: 10c5387d  Table: 9c8bc019  DAC: 00000051
      [   17.970500] Process connmand (pid: 1657, stack limit = 0xdc968210)
      [   17.977059] Stack: (0xdc969cf8 to 0xdc96a000)
      [   17.981692] 9ce0:                                                       dc969d28 dc969d08
      [   17.990386] 9d00: c038f9bc c038f6b4 ddb00480 dc969d34 dc969d28 c042bb74 c042bae4 00000000
      [   17.999080] 9d20: c09562b0 c0954cc0 dc969d5c dc969d38 c043ebfc c042bb6c 00000007 00000003
      [   18.007773] 9d40: ddb00000 ddb8cb58 ddb00480 00000001 dc969dec dc969d60 c0441614 c043ea68
      [   18.016465] 9d60: 00000000 00000003 00000000 fffffff4 dc969df4 0000000d 00000000 00000000
      [   18.025159] 9d80: dc969db4 dc969d90 c005dc08 c05839e0 dc969df4 0000000d ddb00000 00001002
      [   18.033851] 9da0: 00000000 00000000 dc969dcc dc969db8 c005ddf4 c005dbc8 00000000 00000118
      [   18.042544] 9dc0: dc969dec dc969dd0 ddb00000 c06db27c ffff9003 00001002 00000000 00000000
      [   18.051237] 9de0: dc969e0c dc969df0 c057c88c c04410dc dc969e0c ddb00000 ddb00000 00000001
      [   18.059930] 9e00: dc969e34 dc969e10 c057cb44 c057c7d8 ddb00000 ddb00138 00001002 beaeda20
      [   18.068622] 9e20: 00000000 00000000 dc969e5c dc969e38 c057cc28 c057cac0 00000000 dc969e80
      [   18.077315] 9e40: dda7a40c beaeda20 00000000 00000000 dc969ecc dc969e60 c05e36d0 c057cc14
      [   18.086007] 9e60: dc969e84 00000051 beaeda20 00000000 dda7a40c 00000014 ddb00000 00008914
      [   18.094699] 9e80: 30687465 00000000 00000000 00000000 00009003 00000000 00000000 00000000
      [   18.103391] 9ea0: 00001002 00008914 dd257ae0 beaeda20 c098a428 beaeda20 00000011 00000000
      [   18.112084] 9ec0: dc969edc dc969ed0 c05e4e54 c05e3030 dc969efc dc969ee0 c055f5ac c05e4cc4
      [   18.120777] 9ee0: beaeda20 dd257ae0 dc8ab4c0 00008914 dc969f7c dc969f00 c010b388 c055f45c
      [   18.129471] 9f00: c071ca40 dd257ac0 c00165e8 dc968000 dc969f3c dc969f20 dc969f64 dc969f28
      [   18.138164] 9f20: c0115708 c0683ec8 dd257ac0 dd257ac0 dc969f74 dc969f40 c055f350 c00fc66c
      [   18.146857] 9f40: dd82e4d0 00000011 00000000 00080000 dd257ac0 00000000 dc8ab4c0 dc8ab4c0
      [   18.155550] 9f60: 00008914 beaeda20 00000011 00000000 dc969fa4 dc969f80 c010bc34 c010b2fc
      [   18.164242] 9f80: 00000000 00000011 00000002 00000036 c00165e8 dc968000 00000000 dc969fa8
      [   18.172935] 9fa0: c00163e0 c010bbcc 00000000 00000011 00000011 00008914 beaeda20 00009003
      [   18.181628] 9fc0: 00000000 00000011 00000002 00000036 00081018 00000001 00000000 beaedc10
      [   18.190320] 9fe0: 00083188 beaeda1c 00043a5d b6d29c0c 600b0010 00000011 00000000 00000000
      [   18.198989] Backtrace:
      [   18.201621] [<c042bad8>] (phy_attached_print) from [<c042bb74>] (phy_attached_info+0x14/0x18)
      [   18.210664]  r3:c0954cc0 r2:c09562b0 r1:00000000
      [   18.215588]  r4:ddb00480
      [   18.218322] [<c042bb60>] (phy_attached_info) from [<c043ebfc>] (cpsw_slave_open+0x1a0/0x280)
      [   18.227293] [<c043ea5c>] (cpsw_slave_open) from [<c0441614>] (cpsw_ndo_open+0x544/0x674)
      [   18.235874]  r7:00000001 r6:ddb00480 r5:ddb8cb58 r4:ddb00000
      [   18.241944] [<c04410d0>] (cpsw_ndo_open) from [<c057c88c>] (__dev_open+0xc0/0x128)
      [   18.249972]  r9:00000000 r8:00000000 r7:00001002 r6:ffff9003 r5:c06db27c r4:ddb00000
      [   18.258255] [<c057c7cc>] (__dev_open) from [<c057cb44>] (__dev_change_flags+0x90/0x154)
      [   18.266745]  r5:00000001 r4:ddb00000
      [   18.270575] [<c057cab4>] (__dev_change_flags) from [<c057cc28>] (dev_change_flags+0x20/0x50)
      [   18.279523]  r9:00000000 r8:00000000 r7:beaeda20 r6:00001002 r5:ddb00138 r4:ddb00000
      [   18.287811] [<c057cc08>] (dev_change_flags) from [<c05e36d0>] (devinet_ioctl+0x6ac/0x76c)
      [   18.296483]  r9:00000000 r8:00000000 r7:beaeda20 r6:dda7a40c r5:dc969e80 r4:00000000
      [   18.304762] [<c05e3024>] (devinet_ioctl) from [<c05e4e54>] (inet_ioctl+0x19c/0x1c8)
      [   18.312882]  r10:00000000 r9:00000011 r8:beaeda20 r7:c098a428 r6:beaeda20 r5:dd257ae0
      [   18.321235]  r4:00008914
      [   18.323956] [<c05e4cb8>] (inet_ioctl) from [<c055f5ac>] (sock_ioctl+0x15c/0x2d8)
      [   18.331829] [<c055f450>] (sock_ioctl) from [<c010b388>] (do_vfs_ioctl+0x98/0x8d0)
      [   18.339765]  r7:00008914 r6:dc8ab4c0 r5:dd257ae0 r4:beaeda20
      [   18.345822] [<c010b2f0>] (do_vfs_ioctl) from [<c010bc34>] (SyS_ioctl+0x74/0x84)
      [   18.353573]  r10:00000000 r9:00000011 r8:beaeda20 r7:00008914 r6:dc8ab4c0 r5:dc8ab4c0
      [   18.361924]  r4:00000000
      [   18.364653] [<c010bbc0>] (SyS_ioctl) from [<c00163e0>] (ret_fast_syscall+0x0/0x3c)
      [   18.372682]  r9:dc968000 r8:c00165e8 r7:00000036 r6:00000002 r5:00000011 r4:00000000
      [   18.380960] Code: e92dd810 e24cb010 e24dd010 e59b4004 (e5902180)
      [   18.387580] ---[ end trace c80529466223f3f3 ]---
      Signed-off-by: NAndrew Goodbody <andrew.goodbody@cambrionix.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      cfe25560
  12. 12 4月, 2016 2 次提交
  13. 08 1月, 2016 2 次提交
  14. 30 12月, 2015 1 次提交
  15. 19 12月, 2015 3 次提交
  16. 19 11月, 2015 1 次提交
  17. 05 11月, 2015 1 次提交
  18. 23 10月, 2015 1 次提交
  19. 21 10月, 2015 1 次提交
  20. 16 10月, 2015 1 次提交
  21. 22 9月, 2015 1 次提交
  22. 16 9月, 2015 1 次提交
    • M
      drivers: net: cpsw: Add support to drive gpios for ethernet to be functional · 1d147ccb
      Mugunthan V N 提交于
      In DRA72x EVM, by default slave 1 is connected to the onboard
      phy, but slave 2 pins are also muxed with video input module
      which is controlled by pcf857x gpio and currently to select slave
      0 to connect to phy gpio hogging is used, but with
      omap2plus_defconfig the pcf857x gpio is built as module. So when
      using NFS on DRA72x EVM, board doesn't boot as gpio hogging do
      not set proper gpio state to connect slave 0 to phy as it is
      built as module and you do not see any errors for not setting
      gpio and just mentions dhcp reply not got.
      
      To solve this issue, introducing "mode-gpios" in DT when gpio
      based muxing is required. This will throw a warning when gpio
      get fails and returns probe defer. When gpio-pcf857x module is
      installed, cpsw probes again and ethernet becomes functional.
      Verified this on DRA72x with pcf as module and ramdisk.
      Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com>
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1d147ccb
  23. 14 8月, 2015 1 次提交
    • M
      drivers: net: cpsw: add am335x errata workarround for interrutps · 7da11600
      Mugunthan V N 提交于
      As per Am335x Errata [1] Advisory 1.0.9, The CPSW C0_TX_PEND and
      C0_RX_PEND interrupt outputs provide a single transmit interrupt
      that combines transmit channel interrupts TXPEND[7:0] and a
      single receive interrupt that combines receive channel interrupts
      RXPEND[7:0]. The TXPEND[0] and RXPEND[0] interrupt outputs are
      connected to the ARM Cortex-A8 interrupt controller (INTC) rather
      than the C0_TX_PEND and C0_RX_PEND interrupt outputs. So even
      though CPSW interrupt is cleared by writing appropriate values to
      EOI register the interrupt is not cleared in IRQ controller. So
      interrupt is still pending and CPU is struck in ISR, the
      workaround is to disable the interrupts in ARM irq controller.
      
      [1] http://www.ti.com/lit/er/sprz360f/sprz360f.pdfSigned-off-by: NMugunthan V N <mugunthanvnm@ti.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7da11600
  24. 07 8月, 2015 3 次提交
  25. 22 7月, 2015 1 次提交