for AR9002 family of chipsets and for WoW sleep, we reprogram
the SerDes so that the PLL and CHK REQ are both enabled. this
uses more power but in certain cases this is required as otherwise
WoW sleep is unstable and chip may disappear.

Cc: Senthil Balasubramanian <senthilb@qca.qualcomm.com>
Cc: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Cc: vadivel@qca.qualcomm.com
Signed-off-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Signed-off-by: NMohammed Shafi Shajakhan <mohammed@qca.qualcomm.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Makes them more readable and reduces code size
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Comparing SHA1 checksums of the initval tables has shown that there are many
tables that are 100% identical.

iniBank{0,1,2,3,7} and iniBB_RfGain are shared by AR5416, AR913x, AR9160
iniBank6 is shared between AR5416 and AR9160
iniBank6TPC is shared between AR913x and AR9160

iniPcieSerdes is the same for all AR9002 based devices

The CCK FIR coefficients are shared between AR9271 and AR9287

Getting rid of those duplicates saves about 7.5k uncompressed (on MIPS).

For AR9003 and later there are some duplicates as well, but I've decided to
leave them in for now, as the initvals for those chips are still actively
maintained by QCA.
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

It was used for the defunct 'turbo' mode which was never implemented in the
driver. Saves ~7.5k uncompressed
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

The Times They Are a-Changin'.
Signed-off-by: NSujith Manoharan <Sujith.Manoharan@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

According to documentation, The following chip revisions were never sold:

- AR9280 v1.0
- AR9285 v1.0
- AR9285 v1.1
- AR9287 v1.0

Removing initvals specific to these chip revisions saves around 30k in
binary size (tested on MIPS).
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This includes the following changes/fixes:

 - a bugfix for stuck beacon issues
 - timing changes for improved performance
 - AGC setting improvements
 - fixes for high temperature issues on some chips
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This format is generated by the initval tool, available at:
git://git.kernel.org/pub/scm/linux/kernel/git/mcgrof/initvals-tool.gitSigned-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Update from internal systems engineering team.
Signed-off-by: NSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

If bit 29 is set, MAC H/W can attempt to decrypt the received aggregate
with WEP or TKIP, eventhough the received frame may be a CRC failed
corrupted frame. If this bit is set, H/W obeys key type in keycache.
If it is not set and if the key type in keycache is neither open nor
AES, H/W forces key type to be open.  But bit 29 should be set to 1
for AsyncFIFO feature to encrypt/decrypt the aggregate with WEP or TKIP.

Cc: stable@kernel.org
Reported-by: NJohan Hovold <johan.hovold@lundinova.se>
Signed-off-by: NVivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: NRanga Rao Ravuri <ranga.ravuri@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

The initvals.h file is over 7000 lines now, so instead of adding
AR9003 initvals to it instead lets split the current initvals.h by
hardware family: AR5008, AR9001, AR9002

The AR9003 family will have its own initval file later.
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This patch adds support for a modified newer version of AR9285
chipsets.
Signed-off-by: NVivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Update the register initialization values for AR9271.
This is based on our last review from our systems team.
Signed-off-by: NSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This update the register initialization/reset values (aka initvals)
for ar9271 based on the last recommended values on 2009-06-04 by our
systems engineering team.

The changes account for:

  * Supporting ar9271 1.0 and ar9271 1.1 together, the difference
    is bb_spectral_scan_ena, for 1.0 we'll set this to 0x1.

  * Ensuring we get the correct noise floor values -115 ~ -118
    when we enable bb_enable_ant_div_lnadiv=0 and
    mc_tx_def_ant_sel=1. Previous to this we would get noise
    floor values in the range -50 ~ -80. To fix settings for
    the registers:

     - bb_ch1_xatten1_db
     - bb_ch1_xatten2_db
     - bb_ch1_xatten1_margin
     - bb_ch1_xatten2_margin
     - bb_ch1_gain_force
     - bb_ch1_xatten2_hyst_margin
     - bb_ch1_xatten1_hyst_margin
     - bb_ch1_max_oc_gain

  * 0x8120[2] mc_mic_new_location_enable is changed to 0x1. The MAC team
    suggest to set this value.

  * 0x9910[0] bb_spectral_scan_ena is changed to 0x0.
    For ar9271 1.1 we don't need to enable this bit.

Cc: Stephen Chen <Stephen.Chen@atheros.com>
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

* Move 0xa274 and 0xa27c to the top of tx_gain table.
* Update initvals to fix random failure of noise floor calibration.
Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

If the current channel is between 2412 and 2472 MHz and if the channel is
changing to 2484 MHz, then the registers 0xa1f4, 0xa1f8 and 0xa1fc need to be
programmed to the "japan_2484" values.  Conversely, if the current channel
is 2484 MHz and if the channel is changing to one between 2412 and 2472 MHz, then
the three registers need to be programmed to the "normal" values.

This is needed for compliance with Japanese regulatory requirements.
Signed-off-by: NSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Signed-off-by: NSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Cc: Stephen Chen <stephen.chen@atheros.com>
Cc: Zhifeng Cai <zhifeng.cai@atheros.com>
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Signed-off-by: NVivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Running iperf along with p2p traffic on both TX and RX side then
stop one side, then stop the other side, then start it up again,
eventually the STA gets into a mode that it can not pass data at
all.

A hardware workaround for invalid RSSI can make FIFO write pointer
to jump over read pointer, causing RX data corruption and repeated
DMA. Both TX and RX works fine when the workaround is disabled.

To replace the original hardware work around, software looks for
frames with post delimiter CRC error and mark the RSSI invalid so
that the upperlayer will not use the RSSI associated with this
frame. So disable the hardware workaround by updating the appropriate
registers.
Signed-off-by: NSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

How time flies.
Signed-off-by: NSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

The current macro is wrong, because detects some AR5416 devices as an
AR9100 device. The AR5416 devices would have performance issues after
this change, because the contents of the ar5416 specific and of the
ar9100 specificinitval arrays are swapped. Fortunately we can correct
this with the rename of the arrays simply.

Changes-licesed-under: ISC
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This patch updates the initvalues for AR9285 chipset and also adds
periodic PA offset caliberation.
Signed-off-by: NSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Writing the register at offset 0x98c4 causes a deadlock on the AR913x
SoCs. Although i don't have detailed knowledge about these registers,
but if i change the register offset according to the 'ar5416Addac' table,
it works. Additionally there is no reference to the 0x98c4 elsewhere.

Changes-licensed-under: ISC
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Tested-by: NPavel Roskin <proski@gnu.org>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

Signed-off-by: NSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This patch adds the initvalues required for AR9285 chipset.
Signed-off-by: NSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

init values update for various atheros chipsets.
Signed-off-by: NSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>

This adds the new mac80211 11n ath9k Atheros driver. Only STA support
is currently enabled and tested.
Signed-off-by: NSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: NFelix Fietkau <nbd@openwrt.org>
Signed-off-by: NJack Howarth <howarth@bromo.msbb.uc.edu>
Signed-off-by: NJouni Malinen <jouni.malinen@atheros.com>
Signed-off-by: NSujith Manoharan <Sujith.Manoharan@atheros.com>
Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: NPavel Roskin <proski@gnu.org>
Signed-off-by: NVasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>