- 24 11月, 2014 40 次提交
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由 Sergey Ryazanov 提交于
Add basic support for Atheros AR5312/AR2312 SoCs: registers definition file and initial setup code. Signed-off-by: NSergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8238/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Sergey Ryazanov 提交于
Add common code for Atheros AR5312 and Atheros AR2315 SoCs families. Signed-off-by: NSergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8237Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Alban Bedel 提交于
Fix some value corruptions with values that can't be represented in a signed long. Signed-off-by: NAlban Bedel <albeu@free.fr> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8358/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Alban Bedel 提交于
When reading u-boot's key=value pairs it should skip the '=' and not use the next argument. Signed-off-by: NAlban Bedel <albeu@free.fr> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8357/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8034/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8029/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8031/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
This is the small version of MT7620a. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8030/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Add support for the new MT7621/8 SoC and kill ifdefs. Cleanup some whitespace error while we are at it. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8028/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Before we had a pinctrl driver we used a custom OF api. This patch converts the soc specific pinmux data to a new set of structs. We also add some new pinmux setings. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8009/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
This is a regression caused by: commit afb46f79 Author: Rob Herring <robh@kernel.org> Date: Wed Apr 2 19:07:24 2014 -0500 mips: ralink: convert to use unflatten_and_copy_device_tree Make the of init code reuse the cmdline defined inside the dts. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8008/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
This patch adds a trivial driver that allows userland to extract the bootrom of a SoC via debugfs. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8002/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Register the wireless mac clock on rti3883. This is required by the wifi driver. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8007/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Register the wireleass mac clock on rt2880. This is required by the wifi driver. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8006/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
This function was missing causing make allmod to fail. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8005/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
RT5350 relies on the bootloader setting up the memc correctly. On some boards the setup is incorrect leading to 32 MB being available but only 16 MB being recognized. Allow these boards to manually override the memory range. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8004/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
These SoCs have a special irq that fires upon an illegal memmory access. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8003/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
We already have a read and write wrapper. This adds the missing mask wrapper. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8001/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8000/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Print the PMU and LDO settings on boot. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/7999/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Signed-off-by: NThomas Langer <thomas.langer@lantiq.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8050/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
The code to detect unfused SoCs was broken due to missing register masking. Signed-off-by: NThomas Langer <thomas.langer@lantiq.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8049/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
This is a regression caused by: commit afb46f79 Author: Rob Herring <robh@kernel.org> Date: Wed Apr 2 19:07:24 2014 -0500 mips: ralink: convert to use unflatten_and_copy_device_tree Make the of init code reuse the cmdline defined inside the dts. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8048/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
The eiu init failed as the irq_domain was not yet available. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8047/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
The voice and dsl drivers need to know which SoC we are running on. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/8046/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
VR9 needs different firmware files for the various phy/soc revisions. Some boards are ship with older and newer SoC revisions. To be able to boot a single image on all versions we need to define both firmware files inside the devicetree. Signed-off-by: NÁlvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8045/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
A reboot sometimes lead to a none working phy. An explicit reboot fixes the problem. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8044/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
Add a reset-controller binding for the reset registers found on the lantiq SoC. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8043/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 John Crispin 提交于
The Lantiq SoCs have a 2nd mips core called "voice mips macro core (vmmc)" which is used to run the voice firmware. This driver allows us to register a chunk of memory that the voice driver can later use for the 2nd core. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8042/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Tomeu Vizoso 提交于
Replacing it with a call to __clk_is_prepared(), which isn't entirely equivalent but in practice shouldn't matter. Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8120/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andrew Bresticker 提交于
Instead of requiring an explicit call to gic_clockevent_init in the SMP startup path, use CPU notifiers to register and enable the GIC timer on CPU startup. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8139/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andrew Bresticker 提交于
There's no reason for gic_frequency to be global any more and it certainly doesn't belong in the GIC irqchip driver, so move it to the GIC clocksource driver. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8137/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andrew Bresticker 提交于
Combine the GIC clocksource driver with the GIC clockevent driver from arch/mips/kernel/cevt-gic.c and remove the clockevent driver's separate Kconfig symbol. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8132/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andrew Bresticker 提交于
Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Kevin Cernekee 提交于
This supports SMP Linux running on the BCM3384 Zephyr (BMIPS5000) application processor, with fully functional UART and USB 1.1/2.0. Device Tree is used to configure the following items: - All peripherals - Early console base address - SMP or UP mode - MIPS counter frequency - Memory size / regions - DMA offset - Kernel command line The DT-enabled bootloader and build instructions are posted at https://github.com/Broadcom/aeolusSigned-off-by: NKevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8170/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Kevin Cernekee 提交于
A couple of platforms register two buses and call of_platform_populate(). Move this into a common function to reduce duplication. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8167/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Kevin Cernekee 提交于
This is a dual core (quad thread) BMIPS5000. It needs a little extra code to boot the second core (CPU2/CPU3), but for now we can treat it the same as a single core BMIPS5000. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8166/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Kevin Cernekee 提交于
BMIPS435x and BMIPS438x have a single shared L1 D$ and load/store unit, so it isn't necessary to raise IPIs to keep both CPUs coherent. BMIPS5000 has VIPT L1 caches that handle aliases in hardware, and its I$ fills from D$. But a special sequence with 2 SYNCs and 32 NOPs is needed to ensure coherency. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8165/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Kevin Cernekee 提交于
On some chips like bcm3384, "other stuff" gets wired up to CPU1's IE_IRQ1 input, generating spurious IRQs. In this case we want the platform code to be able to mask it off. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8163/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Kevin Cernekee 提交于
BMIPS438x has a 64-byte D$ line size and BMIPS5000 has a 128-byte L2 line size. If L1_CACHE_SHIFT is undersized, DMA buffers will not be cacheline-aligned and terrible things will happen. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: mbizon@freebox.fr Cc: jogo@openwrt.org Cc: jfraser@broadcom.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8164/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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