1. 29 8月, 2022 1 次提交
  2. 28 7月, 2022 1 次提交
  3. 27 6月, 2022 1 次提交
  4. 21 6月, 2022 2 次提交
  5. 17 6月, 2022 8 次提交
  6. 16 6月, 2022 2 次提交
  7. 14 6月, 2022 1 次提交
  8. 01 6月, 2022 7 次提交
  9. 28 5月, 2022 2 次提交
  10. 05 5月, 2022 1 次提交
  11. 26 4月, 2022 5 次提交
  12. 25 4月, 2022 1 次提交
  13. 21 4月, 2022 3 次提交
  14. 20 4月, 2022 1 次提交
  15. 13 4月, 2022 2 次提交
  16. 12 4月, 2022 1 次提交
  17. 31 3月, 2022 1 次提交
    • J
      drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTL · 47e794d6
      José Roberto de Souza 提交于
      PIPE_MBUS_DBOX_CTL was only being programmed when a pipe is being
      enabled but that could potentially cause issues as it could have
      mismatching values while pipes are being enabled.
      
      So here moving the PIPE_MBUS_DBOX_CTL programming of all pipes to be
      executed before the function that enables all pipes, leaving all pipes
      with a matching A_CREDIT value.
      
      While at it, also moving it to intel_pm.c as we are trying to reduce
      the gigantic size of intel_display.c and intel_pm.c have other MBUS
      programing sequences.
      
      v2:
      - do not program PIPE_MBUS_DBOX_CTL if pipe will not be active or
      when it do not needs modeset
      - remove the checks to wait a vblank
      
      v3:
      - checking if dbuf state is present in state before using it
      
      v4:
      - removing redundant checks
      - calling intel_atomic_get_new_dbuf_state instead of
      intel_atomic_get_dbuf_state
      
      BSpec: 49213
      BSpec: 50343
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
      Signed-off-by: NJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20220330155724.255226-3-jose.souza@intel.com
      47e794d6