- 06 1月, 2013 3 次提交
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由 Antti Palosaari 提交于
We need feed clock to slave demodulator at the very beginning in case of dual tuner configuration. I am not sure if that configuration changes clock output divider or enable clock output itself... Signed-off-by: NAntti Palosaari <crope@iki.fi> Acked-by: NHans-Frieder Vogt <hfvogt@gmx.net> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Antti Palosaari 提交于
Signed-off-by: NAntti Palosaari <crope@iki.fi> Acked-by: NHans-Frieder Vogt <hfvogt@gmx.net> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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由 Antti Palosaari 提交于
I need even more configuration options and overloading dvb_attach() for all those sounds quite stupid. Due to that switch struct and make room for new options. Signed-off-by: NAntti Palosaari <crope@iki.fi> Acked-by: NHans-Frieder Vogt <hfvogt@gmx.net> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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- 14 8月, 2012 1 次提交
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由 Mauro Carvalho Chehab 提交于
Move the tuners one level up, as the "common" directory will be used by drivers that are shared between more than one driver. Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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- 20 5月, 2012 1 次提交
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由 Hans-Frieder Vogt 提交于
Support for tuner Fitipower FC0012 Signed-off-by: NHans-Frieder Vogt <hfvogt@gmx.net> Signed-off-by: NAntti Palosaari <crope@iki.fi> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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- 24 9月, 2011 1 次提交
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由 Igor M. Liplianin 提交于
[mchehab@redhat.com: Fix a merge conflict] Signed-off-by: NIgor M. Liplianin <liplianin@netup.ru> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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- 08 6月, 2011 1 次提交
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由 Greg Kroah-Hartman 提交于
Staging drivers should be self-contained, without files in the include/ directories. So move the altera.h file back to the driver directory for now, until it moves out of the staging tree. Cc: Igor M. Liplianin <liplianin@netup.ru> Cc: Mauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 22 3月, 2011 1 次提交
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由 Igor M. Liplianin 提交于
It uses STAPL files and programs Altera FPGA through JTAG. Interface to JTAG must be provided from main device module, for example through cx23885 GPIO. Signed-off-by: NIgor M. Liplianin <liplianin@netup.ru> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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