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  1. 01 12月, 2018 5 次提交
    • M
      kbuild: change if_changed_rule for multi-line recipe · 3a2429e1
      由 Masahiro Yamada 提交于 
      The 'define' ... 'endef' directive is useful to confine a series of
shell commands into a single macro:

  define foo
          [action1]
          [action2]
          [action3]
  endif

Each action is executed in a separate subshell.

However, rule_cc_o_c and rule_as_o_S in scripts/Makefile.build are
written as follows (with a trailing semicolon in each cmd_*):

  define rule_cc_o_c
          [action1] ; \
          [action2] ; \
          [action3] ;
  endef

All shell commands are concatenated with '; \' so that it looks like
a single command from the Makefile point of view. This does not
exploit the benefits of 'define' ... 'endef' form because a single
shell command can be more simply written, like this:

  rule_cc_o_c = \
          [action1] ; \
          [action2] ; \
          [action3] ;

I guess the intention for the command concatenation was to let the
'@set -e' in if_changed_rule cover all the commands.

We can improve the readability by moving '@set -e' to the 'cmd' macro.
The combo of $(call echo-cmd,*) $(cmd_*) in rule_cc_o_c and rule_as_o_S
have been replaced with $(call cmd,*). The trailing back-slashes have
been removed.

Here is a note about the performance: the commands in rule_cc_o_c and
rule_as_o_S were previously executed all together in a single subshell,
but now each line in a separate subshell. This means Make will spawn
extra subshells [1]. I measured the build performance for
  x86_64_defconfig + CONFIG_MODVERSIONS + CONFIG_TRIM_UNUSED_KSYMS
and I saw slight performance regression, but I believe code readability
and maintainability wins.

[1] Precisely, GNU Make may optimize this by executing the command
    directly instead of forking a subshell, if no shell special
    characters are found in the command line and omitting the subshell
    will not change the behavior.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      3a2429e1
    • M
      kbuild: simplify dependency generation for CONFIG_TRIM_UNUSED_KSYMS · bbda5ec6
      由 Masahiro Yamada 提交于 
      My main motivation of this commit is to clean up scripts/Kbuild.include
and scripts/Makefile.build.

Currently, CONFIG_TRIM_UNUSED_KSYMS works with a tricky gimmick;
possibly exported symbols are detected by letting $(CPP) replace
EXPORT_SYMBOL* with a special string '=== __KSYM_*===', which is
post-processed by sed, and passed to fixdep. The extra preprocessing
is costly, and hacking cmd_and_fixdep is ugly.

I came up with a new way to find exported symbols; insert a dummy
symbol __ksym_marker_* to each potentially exported symbol. Those
dummy symbols are picked up by $(NM), post-processed by sed, then
appended to .*.cmd files. I collected the post-process part to a
new shell script scripts/gen_ksymdeps.sh for readability. The dummy
symbols are put into the .discard.* section so that the linker
script rips them off the final vmlinux or modules.

A nice side-effect is building with CONFIG_TRIM_UNUSED_KSYMS will
be much faster.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NNicolas Pitre <nico@linaro.org>
      bbda5ec6
    • M
      kbuild: refactor modversions build rules · ee3e46b7
      由 Masahiro Yamada 提交于 
      Let $(CC) compile objects into normal files *.o instead of .tmp_*.o
whether CONFIG_MODVERSIONS is enabled or not. With this, the input
file for objtool is always *.o so objtool_o can go away.

I guess the reason of using .tmp_*.o for intermediate objects was
to avoid leaving incomplete *.o file (, whose timestamp says it is
up-to-date) when the genksyms tool failed for some reasons.

It no longer matters because any targets are deleted on errors since
commit 9c2af1c7 ("kbuild: add .DELETE_ON_ERROR special target").
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      ee3e46b7
    • M
      kbuild: remove redundant 'set -e' from sub_cmd_record_mcount · 4317ee3b
      由 Masahiro Yamada 提交于 
      This is executed inside the if_changed_rule, which already sets
'set -e'.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      4317ee3b
    • M
      kbuild: let fixdep directly write to .*.cmd files · 392885ee
      由 Masahiro Yamada 提交于 
      Currently, fixdep writes dependencies to .*.tmp, which is renamed to
.*.cmd after everything succeeds. This is a very safe way to avoid
corrupted .*.cmd files. The if_changed_dep has carried this safety
mechanism since it was added in 2002.

If fixdep fails for some reasons or a user terminates the build while
fixdep is running, the incomplete output from the fixdep could be
troublesome.

This is my insight about some bad scenarios:

[1] If the compiler succeeds to generate *.o file, but fixdep fails
    to write necessary dependencies to .*.cmd file, Make will miss
    to rebuild the object when headers or CONFIG options are changed.
    In this case, fixdep should not generate .*.cmd file at all so
    that 'arg-check' will surely trigger the rebuild of the object.

[2] A partially constructed .*.cmd file may not be a syntactically
    correct makefile. The next time Make runs, it would include it,
    then fail to parse it. Once this happens, 'make clean' is be the
    only way to fix it.

In fact, [1] is no longer a problem since commit 9c2af1c7 ("kbuild:
add .DELETE_ON_ERROR special target"). Make deletes a target file on
any failure in its recipe. Because fixdep is a part of the recipe of
*.o target, if it fails, the *.o is deleted anyway. However, I am a
bit worried about the slight possibility of [2].

So, here is a solution. Let fixdep directly write to a .*.cmd file,
but allow makefiles to include it only when its corresponding target
exists.

This effectively reverts commit 2982c953 ("kbuild: remove redundant
$(wildcard ...) for cmd_files calculation"), and commit 00d78ab2
("kbuild: remove dead code in cmd_files calculation in top Makefile")
because now we must check the presence of targets.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      392885ee
  3. 19 10月, 2018 2 次提交
    • M
      kbuild: use 'else ifeq' for checksrc to improve readability · 7d0ea252
      由 Masahiro Yamada 提交于 
      'ifeq ... else ifeq ... endif' notation is supported by GNU Make 3.81
or later, which is the requirement for building the kernel since
commit 37d69ee3 ("docs: bump minimal GNU Make version to 3.81").

Use it to improve the readability.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      7d0ea252
    • M
      kbuild: remove unneeded link_multi_deps · 69ea912f
      由 Masahiro Yamada 提交于 
      Since commit c8589d1e ("kbuild: handle multi-objs dependency
appropriately"), $^ really represents all the prerequisite of the
composite object being built.

Hence, $(filter %.o,$^) contains all the objects to link together,
which is much simpler than link_multi_deps calculation.

Please note $(filter-out FORCE,$^) does not work here. When a single
object module is turned into a multi object module, $^ will contain
header files that were previously included for building the single
object, and recorded in the .*.cmd file. To filter out such headers,
$(filter %.o,$^) should be used here.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      69ea912f
  5. 19 9月, 2018 1 次提交
  7. 12 9月, 2018 1 次提交
  9. 30 8月, 2018 1 次提交
  11. 24 8月, 2018 2 次提交
  13. 16 8月, 2018 1 次提交
  15. 09 8月, 2018 1 次提交
  17. 06 7月, 2018 1 次提交
  19. 22 6月, 2018 1 次提交
  21. 29 5月, 2018 1 次提交
  23. 17 5月, 2018 2 次提交
  25. 07 4月, 2018 4 次提交
    • M
      kbuild: mark $(targets) as .SECONDARY and remove .PRECIOUS markers · 54a702f7
      由 Masahiro Yamada 提交于 
      GNU Make automatically deletes intermediate files that are updated
in a chain of pattern rules.

Example 1) %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
Example 2) %.o <- %.c <- %.c_shipped

A couple of makefiles mark such targets as .PRECIOUS to prevent Make
from deleting them, but the correct way is to use .SECONDARY.

  .SECONDARY
    Prerequisites of this special target are treated as intermediate
    files but are never automatically deleted.

  .PRECIOUS
    When make is interrupted during execution, it may delete the target
    file it is updating if the file was modified since make started.
    If you mark the file as precious, make will never delete the file
    if interrupted.

Both can avoid deletion of intermediate files, but the difference is
the behavior when Make is interrupted; .SECONDARY deletes the target,
but .PRECIOUS does not.

The use of .PRECIOUS is relatively rare since we do not want to keep
partially constructed (possibly corrupted) targets.

Another difference is that .PRECIOUS works with pattern rules whereas
.SECONDARY does not.

  .PRECIOUS: $(obj)/%.lex.c

works, but

  .SECONDARY: $(obj)/%.lex.c

has no effect.  However, for the reason above, I do not want to use
.PRECIOUS which could cause obscure build breakage.

The targets specified as .SECONDARY must be explicit.  $(targets)
contains all targets that need to include .*.cmd files.  So, the
intermediates you want to keep are mostly in there.  Therefore, mark
$(targets) as .SECONDARY.  It means primary targets are also marked
as .SECONDARY, but I do not see any drawback for this.

I replaced some .SECONDARY / .PRECIOUS markers with 'targets'.  This
will make Kbuild search for non-existing .*.cmd files, but this is
not a noticeable performance issue.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NFrank Rowand <frowand.list@gmail.com>
Acked-by: NIngo Molnar <mingo@kernel.org>
      54a702f7
    • M
      kbuild: rename *-asn1.[ch] to *.asn1.[ch] · 4fa8bc94
      由 Masahiro Yamada 提交于 
      Our convention is to distinguish file types by suffixes with a period
as a separator.

*-asn1.[ch] is a different pattern from other generated sources such
as *.lex.c, *.tab.[ch], *.dtb.S, etc.  More confusing, files with
'-asn1.[ch]' are generated files, but '_asn1.[ch]' are checked-in
files:
  net/netfilter/nf_conntrack_h323_asn1.c
  include/linux/netfilter/nf_conntrack_h323_asn1.h
  include/linux/sunrpc/gss_asn1.h

Rename generated files to *.asn1.[ch] for consistency.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
      4fa8bc94
    • M
      kbuild: add %.dtb.S and %.dtb to 'targets' automatically · a7f92419
      由 Masahiro Yamada 提交于 
      Another common pattern that consists of chained commands is to compile
a DTB as binary data into the kernel image or a module.  It is used in
several places in the source tree.  Support it in the core Makefile.

$(call if_changed,dt_S_dtb) is more suitable than $(call cmd,dt_S_dtb)
in case cmd_dt_S_dtb is changed in the future.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NFrank Rowand <frowand.list@gmail.com>
      a7f92419
    • M
      kbuild: add %.lex.c and %.tab.[ch] to 'targets' automatically · b23d1a24
      由 Masahiro Yamada 提交于 
      Files generated by if_changed* must be added to 'targets' to include
*.cmd files.  Otherwise, they would be regenerated every time.

The build system automatically adds objects to 'targets' where
appropriate, such as obj-y, extra-y, etc. but does nothing for
intermediate files.  So, each Makefile needs to add them by itself.

There are some common cases where objects are generated by chained
rules.  Lexers and parsers are compiled like follows:

   %.lex.o <- %.lex.c <- %.l
   %.tab.o <- %.tab.c <- %.y

They are common patterns, so it is reasonable to take care of them
in the core Makefile instead of requiring each Makefile to do so.

At this moment, you cannot delete 'target += zconf.lex.c' in the
Kconfig Makefile because zconf.lex.c is included from zconf.tab.c
instead of being compiled separately.  It should be deleted after
Kconfig is more refactored.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NFrank Rowand <frowand.list@gmail.com>
      b23d1a24
  27. 26 3月, 2018 10 次提交
  29. 21 2月, 2018 3 次提交
  31. 16 1月, 2018 1 次提交
  33. 21 11月, 2017 1 次提交
    • M
      Add optional check for bad kernel-doc comments · 3a025e1d
      由 Matthew Wilcox 提交于 
      Implement a '-none' output mode for kernel-doc which will only output
warning messages, and suppresses the warning message about there being
no kernel-doc in the file.

If the build has requested additional warnings, automatically check all
.c files.  This patch does not check .h files.  Enabling the warning
by default would add about 1300 warnings, so it's default off for now.
People who care can use this to check they didn't break the docs and
maybe we'll get all the warnings fixed and be able to enable this check
by default in the future.
Signed-off-by: NMatthew Wilcox <mawilcox@microsoft.com>
Signed-off-by: NJonathan Corbet <corbet@lwn.net>
      3a025e1d
  35. 18 11月, 2017 1 次提交
    • M
      kbuild: create built-in.o automatically if parent directory wants it · f7adc312
      由 Masahiro Yamada 提交于 
      "obj-y += foo/" syntax requires Kbuild to visit the "foo" subdirectory
and link built-in.o from that directory.  This means foo/Makefile is
responsible for creating built-in.o even if there is no object to
link (in this case, built-in.o is an empty archive).

We have had several fixups like commit 4b024242 ("kbuild: Fix
linking error built-in.o no such file or directory"), then ended up
with a complex condition as follows:

  ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  builtin-target := $(obj)/built-in.o
  endif

We still have more cases not covered by the above, so we need to add
  obj- := dummy.o
in several places just for creating empty built-in.o.

A key point is, the parent Makefile knows whether built-in.o is needed
or not.  If a subdirectory needs to create built-in.o, its parent can
tell the fact when descending.

If non-empty $(need-builtin) flag is passed from the parent, built-in.o
should be created.  $(obj-y) should be still checked to support the
single target "%/".  All of ugly tricks will go away.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NSam Ravnborg <sam@ravnborg.org>
      f7adc312
  37. 16 11月, 2017 1 次提交