1. 17 10月, 2013 1 次提交
  2. 30 10月, 2012 1 次提交
  3. 06 10月, 2012 2 次提交
  4. 06 5月, 2012 2 次提交
    • A
      KVM: PPC: Emulator: clean up SPR reads and writes · 54771e62
      Alexander Graf 提交于
      When reading and writing SPRs, every SPR emulation piece had to read
      or write the respective GPR the value was read from or stored in itself.
      
      This approach is pretty prone to failure. What if we accidentally
      implement mfspr emulation where we just do "break" and nothing else?
      Suddenly we would get a random value in the return register - which is
      always a bad idea.
      
      So let's consolidate the generic code paths and only give the core
      specific SPR handling code readily made variables to read/write from/to.
      
      Functionally, this patch doesn't change anything, but it increases the
      readability of the code and makes is less prone to bugs.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      54771e62
    • A
      KVM: PPC: Emulator: clean up instruction parsing · c46dc9a8
      Alexander Graf 提交于
      Instructions on PPC are pretty similarly encoded. So instead of
      every instruction emulation code decoding the instruction fields
      itself, we can move that code to more generic places and rely on
      the compiler to optimize the unused bits away.
      
      This has 2 advantages. It makes the code smaller and it makes the
      code less error prone, as the instruction fields are always
      available, so accidental misusage is reduced.
      
      Functionally, this patch doesn't change anything.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c46dc9a8
  5. 22 5月, 2011 1 次提交
  6. 01 3月, 2010 1 次提交
    • A
      KVM: PPC: Use accessor functions for GPR access · 8e5b26b5
      Alexander Graf 提交于
      All code in PPC KVM currently accesses gprs in the vcpu struct directly.
      
      While there's nothing wrong with that wrt the current way gprs are stored
      and loaded, it doesn't suffice for the PACA acceleration that will follow
      in this patchset.
      
      So let's just create little wrapper inline functions that we call whenever
      a GPR needs to be read from or written to. The compiled code shouldn't really
      change at all for now.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      8e5b26b5
  7. 24 3月, 2009 1 次提交
  8. 31 12月, 2008 5 次提交
    • H
      KVM: ppc: mostly cosmetic updates to the exit timing accounting code · 7b701591
      Hollis Blanchard 提交于
      The only significant changes were to kvmppc_exit_timing_write() and
      kvmppc_exit_timing_show(), both of which were dramatically simplified.
      Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      7b701591
    • H
      KVM: ppc: Implement in-kernel exit timing statistics · 73e75b41
      Hollis Blanchard 提交于
      Existing KVM statistics are either just counters (kvm_stat) reported for
      KVM generally or trace based aproaches like kvm_trace.
      For KVM on powerpc we had the need to track the timings of the different exit
      types. While this could be achieved parsing data created with a kvm_trace
      extension this adds too much overhead (at least on embedded PowerPC) slowing
      down the workloads we wanted to measure.
      
      Therefore this patch adds a in-kernel exit timing statistic to the powerpc kvm
      code. These statistic is available per vm&vcpu under the kvm debugfs directory.
      As this statistic is low, but still some overhead it can be enabled via a
      .config entry and should be off by default.
      
      Since this patch touched all powerpc kvm_stat code anyway this code is now
      merged and simplified together with the exit timing statistic code (still
      working with exit timing disabled in .config).
      Signed-off-by: NChristian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
      Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      73e75b41
    • H
      KVM: ppc: fix userspace mapping invalidation on context switch · fe4e771d
      Hollis Blanchard 提交于
      We used to defer invalidating userspace TLB entries until jumping out of the
      kernel. This was causing MMU weirdness most easily triggered by using a pipe in
      the guest, e.g. "dmesg | tail". I believe the problem was that after the guest
      kernel changed the PID (part of context switch), the old process's mappings
      were still present, and so copy_to_user() on the "return to new process" path
      ended up using stale mappings.
      
      Testing with large pages (64K) exposed the problem, probably because with 4K
      pages, pressure on the TLB faulted all process A's mappings out before the
      guest kernel could insert any for process B.
      Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      fe4e771d
    • H
      KVM: ppc: optimize irq delivery path · d4cf3892
      Hollis Blanchard 提交于
      In kvmppc_deliver_interrupt is just one case left in the switch and it is a
      rare one (less than 8%) when looking at the exit numbers. Therefore we can
      at least drop the switch/case and if an if. I inserted an unlikely too, but
      that's open for discussion.
      
      In kvmppc_can_deliver_interrupt all frequent cases are in the default case.
      I know compilers are smart but we can make it easier for them. By writing
      down all options and removing the default case combined with the fact that
      ithe values are constants 0..15 should allow the compiler to write an easy
      jump table.
      Modifying kvmppc_can_deliver_interrupt pointed me to the fact that gcc seems
      to be unable to reduce priority_exception[x] to a build time constant.
      Therefore I changed the usage of the translation arrays in the interrupt
      delivery path completely. It is now using priority without translation to irq
      on the full irq delivery path.
      To be able to do that ivpr regs are stored by their priority now.
      
      Additionally the decision made in kvmppc_can_deliver_interrupt is already
      sufficient to get the value of interrupt_msr_mask[x]. Therefore we can replace
      the 16x4byte array used here with a single 4byte variable (might still be one
      miss, but the chance to find this in cache should be better than the right
      entry of the whole array).
      Signed-off-by: NChristian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
      Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      d4cf3892
    • H
      KVM: ppc: refactor instruction emulation into generic and core-specific pieces · 75f74f0d
      Hollis Blanchard 提交于
      Cores provide 3 emulation hooks, implemented for example in the new
      4xx_emulate.c:
      kvmppc_core_emulate_op
      kvmppc_core_emulate_mtspr
      kvmppc_core_emulate_mfspr
      
      Strictly speaking the last two aren't necessary, but provide for more
      informative error reporting ("unknown SPR").
      
      Long term I'd like to have instruction decoding autogenerated from tables of
      opcodes, and that way we could aggregate universal, Book E, and core-specific
      instructions more easily and without redundant switch statements.
      Signed-off-by: NHollis Blanchard <hollisb@us.ibm.com>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      75f74f0d