1. 07 1月, 2016 2 次提交
    • M
      drm/i915: Add two-stage ILK-style watermark programming (v10) · 396e33ae
      Matt Roper 提交于
      In addition to calculating final watermarks, let's also pre-calculate a
      set of intermediate watermark values at atomic check time.  These
      intermediate watermarks are a combination of the watermarks for the old
      state and the new state; they should satisfy the requirements of both
      states which means they can be programmed immediately when we commit the
      atomic state (without waiting for a vblank).  Once the vblank does
      happen, we can then re-program watermarks to the more optimal final
      value.
      
      v2: Significant rebasing/rewriting.
      
      v3:
       - Move 'need_postvbl_update' flag to CRTC state (Daniel)
       - Don't forget to check intermediate watermark values for validity
         (Maarten)
       - Don't due async watermark optimization; just do it at the end of the
         atomic transaction, after waiting for vblanks.  We do want it to be
         async eventually, but adding that now will cause more trouble for
         Maarten's in-progress work.  (Maarten)
       - Don't allocate space in crtc_state for intermediate watermarks on
         platforms that don't need it (gen9+).
       - Move WaCxSRDisabledForSpriteScaling:ivb into intel_begin_crtc_commit
         now that ilk_update_wm is gone.
      
      v4:
       - Add a wm_mutex to cover updates to intel_crtc->active and the
         need_postvbl_update flag.  Since we don't have async yet it isn't
         terribly important yet, but might as well add it now.
       - Change interface to program watermarks.  Platforms will now expose
         .initial_watermarks() and .optimize_watermarks() functions to do
         watermark programming.  These should lock wm_mutex, copy the
         appropriate state values into intel_crtc->active, and then call
         the internal program watermarks function.
      
      v5:
       - Skip intermediate watermark calculation/check during initial hardware
         readout since we don't trust the existing HW values (and don't have
         valid values of our own yet).
       - Don't try to call .optimize_watermarks() on platforms that don't have
         atomic watermarks yet.  (Maarten)
      
      v6:
       - Rebase
      
      v7:
       - Further rebase
      
      v8:
       - A few minor indentation and line length fixes
      
      v9:
       - Yet another rebase since Maarten's patches reworked a bunch of the
         code (wm_pre, wm_post, etc.) that this was previously based on.
      
      v10:
       - Move wm_mutex to dev_priv to protect against racing commits against
         disjoint CRTC sets. (Maarten)
       - Drop unnecessary clearing of cstate->wm.need_postvbl_update (Maarten)
      
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1452108870-24204-1-git-send-email-matthew.d.roper@intel.comSigned-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      396e33ae
    • J
      drm/i915: shut up gen8+ SDE irq dmesg noise, again · 2dfb0b81
      Jani Nikula 提交于
      We still keep getting
      
      [    4.249930] [drm:gen8_irq_handler [i915]] *ERROR* The master control interrupt lied (SDE)!
      
      This reverts
      
      commit 820da7ae
      Author: Jani Nikula <jani.nikula@intel.com>
      Date:   Wed Nov 25 16:47:23 2015 +0200
      
          Revert "drm/i915: shut up gen8+ SDE irq dmesg noise"
      
      which in itself is a revert, so this is just doing
      
      commit 97e5ed11
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Fri Oct 23 10:56:12 2015 +0200
      
          drm/i915: shut up gen8+ SDE irq dmesg noise
      
      all over again. I'll stop pretending I understand what's going on like I
      did when I thought I'd fixed this for good in
      
      commit 6a39d7c9
      Author: Jani Nikula <jani.nikula@intel.com>
      Date:   Wed Nov 25 16:47:22 2015 +0200
      
          drm/i915: fix the SDE irq dmesg warnings properly
      Reported-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reference: http://mid.gmane.org/20151213124945.GA5715@nuc-i3427.alporthouse.com
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92084
      Cc: drm-intel-fixes@lists.freedesktop.org
      Fixes: 820da7ae ("Revert "drm/i915: shut up gen8+ SDE irq dmesg noise"")
      Acked-by: NChris Wilson <chris@chris-wilson.co.uk>
      Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1452155350-14658-1-git-send-email-jani.nikula@intel.com
      2dfb0b81
  2. 06 1月, 2016 8 次提交
  3. 05 1月, 2016 17 次提交
  4. 04 1月, 2016 1 次提交
  5. 30 12月, 2015 1 次提交
  6. 23 12月, 2015 1 次提交
  7. 22 12月, 2015 9 次提交
  8. 21 12月, 2015 1 次提交
    • V
      drm/i915: Workaround CHV pipe C cursor fail · b29ec92c
      Ville Syrjälä 提交于
      Turns out CHV pipe C was glued on somewhat poorly, and there's something
      wrong with the cursor. If the cursor straddles the left screen edge,
      and is then moved away from the edge or disabled, the pipe will often
      underrun. If enough underruns are triggered quickly enough the pipe
      will fall over and die (it just scans out a solid color and reports
      a constant underrun). We need to turn the disp2d power well off and
      on again to recover the pipe.
      
      None of that is very nice for the user, so let's just refuse to place
      the cursor in the compromised position. The ddx appears to fall back
      to swcursor when the ioctl returns an error, so theoretically there's
      no loss of functionality for the user (discounting swcursor bugs).
      I suppose most cursors images actually have the hotspot not exactly
      at 0,0 so under typical conditions the fallback will in fact kick in
      as soon as the cursor touches the left edge of the screen.
      
      Any atomic compositor should anyway be prepared to fall back to
      GPU composition when things don't work out, so there should be no
      problem with those.
      
      Other things that I tried to solve this include flipping all
      display related clock gating knobs I could find, increasing the
      minimum gtt alignment all the way up to 512k. I also tried to see
      if there are more specific screen coordinates that hit the bug, but
      the findings were somewhat inconclusive. Sometimes the failures
      happen almost across the whole left edge, sometimes more at the very
      top and around the bottom half. I wasn't able to find any real pattern
      to these variations, so it seems our only choice is to just refuse
      to straddle the left screen edge at all.
      
      Cc: stable@vger.kernel.org
      Cc: Jason Plum <max@warheads.net>
      Testcase: igt/kms_chv_cursor_fail
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92826Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1450459479-16286-1-git-send-email-ville.syrjala@linux.intel.comSigned-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b29ec92c