- 05 10月, 2015 1 次提交
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由 Lendacky, Thomas 提交于
Remove an unneeded semicolon at the end of a switch statement block. Reported-by: Nkbuild test robot <fengguang.wu@intel.com> Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 7月, 2015 1 次提交
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由 Lendacky, Thomas 提交于
When running a kernel configured with CONFIG_DMA_API_DEBUG=y a warning is issued: DMA-API: device driver tries to sync DMA memory it has not allocated This warning is the result of mapping the full range of the Rx buffer pages allocated and then performing a dma_sync_single_for_cpu against a calculated DMA address. The proper thing to do is to use the dma_sync_single_range_for_cpu with a base DMA address and an offset. Reported-by: NKim Phillips <kim.phillips@arm.com> Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Tested-by: NKim Phillips <kim.phillips@arm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 5月, 2015 3 次提交
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由 Lendacky, Thomas 提交于
The AMD XGBE device is intended to work with a specific integrated PHY and that PHY is not meant to be a standalone PHY for use by other devices. As such this patch removes the phylib driver and implements the PHY support in the amd-xgbe driver (the majority of the logic from the phylib driver is moved into the amd-xgbe driver). Update the driver version to 1.0.1. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Add support for the network interface message level settings for determining whether to issue some of the driver messages. Make use of the netif_* interface where appropriate. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Add additional/extended statistics beyond what is provided by the hardware to be reported via ethtool. The new stats focus on the calls into ndo_start_xmit and the napi_poll routine. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 4月, 2015 2 次提交
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由 Lendacky, Thomas 提交于
Currently a call to configure the Rx mode (promiscuous mode, all multicast mode, etc.) is made in xgbe_start separate from the xgbe_init function. This call to set the Rx mode should be part of the xgbe_init function so that calls to the init function don't have to be preceded with calls to configure the Rx mode. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Currently the device must be down in order to update the rx-frames coalescing setting because the interrupt indicator is set in the descriptor data during initialization. Allow this setting to be changed while the device is up by moving the interrupt decision into the descriptor reset function and base the decision off of the supplied descriptor index value. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 3月, 2015 3 次提交
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由 Lendacky, Thomas 提交于
The Tx coalescing support in the driver was a software implementation for something lacking in the hardware. Using hrtimers, the idea was to trigger a timer interrupt after having queued a packet for transmit. Unfortunately, as the timer value was lowered, the timer expired before the hardware actually did the transmit and so it was racey and resulted in unnecessary interrupts. Remove the Tx coalescing support and hrtimer and replace with a Tx timer that is used as a reclaim timer in case of inactivity. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Use the new lighter weight memory barriers when working with the device descriptors. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Clarify that the queues referred to in a message when the device is brought up are hardware queues and not necessarily related to the Linux network queues. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 1月, 2015 1 次提交
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由 Lendacky, Thomas 提交于
Updated hardware documention shows the Rx flow control settings were moved from the Rx queue operation mode register to a new Rx queue flow control register. The old flow control settings are now reserved areas of the Rx queue operation mode register. Update the code to use the new register. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 1月, 2015 4 次提交
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由 Lendacky, Thomas 提交于
Add support for ACPI to the amd-xgbe and amd-xgbe-phy drivers. This support converts many of the device tree APIs to the new device_property APIs. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
The auto negotiation logic was geared to being the initiator of the auto negotiation. This presented problems when auto negotiation was initiated by the remote end. Change the auto negotiation logic to make use of the auto negotiation event interrupt thus allowing the auto negotiation state machine to function properly in either scenario. This also removes the polling during auto-negotiation. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Since the Tx ring cleanup can run at the same time that data is being transmitted, a spin lock was used to protect the ring. This patch eliminates the need for Tx spinlocks by updating the current ring position only after all ownership bits for data being transmitted have been set. This will insure that ring operations in the Tx cleanup path do not interfere with the ring operations in the Tx transmit path. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
When performing a device restart, like during an MTU change, sometimes the device queues still have data and get hung up trying to flush resulting in the device becoming unresponsive until brought down and back up. To prevent this, always perform a device reset during a restart. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 11月, 2014 7 次提交
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由 Lendacky, Thomas 提交于
Add support to delay telling the hardware about data that is ready to be transmitted if the skb->xmit_more flag is set. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
The current form of Tx coalescing works on a descriptor basis instead of on a packet basis and doesn't take into account TSO packets. Update the Tx coalescing support to work on a packet basis, taking into account the number of packets associated with a TSO transmit. Also, only activate the Tx timer if a timer value is set. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Call the appropriate BQL functions to track the number of bytes queued during Tx processing and to track the number of packets and bytes that have been transmitted during Tx complete processing. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Move the Tx and Rx related fields within the xgbe_ring_data struct into their own structs in order to more easily see what fields are used for each operation. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
The Smatch tool indicated that one of the if statements in xgbe-dev.c could be rewritten to remove a redundant check for the 'err' variable in an if statement. Change the statement as suggested and add a comment to help clarify. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
If the Tx engine is told to stop while it is actively processing Tx descriptors it is possible that the Tx descriptor(s) will not be closed out properly. When the Tx engine is restarted this could result in the driver being stuck on the improperly closed descriptor. Update the driver to wait for the Tx engine to be in a stopped or suspended state before issuing the stop command. This has not been an issue to date, but it's a good safe-guard to have. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Add a read memory barrier to the Tx and Rx paths where the ownership bit is checked to be sure that all descriptor fields are read after having read the ownership bit for the descriptor. This has not been an issue to date, but it's a good safe-guard to have. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 14 11月, 2014 1 次提交
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由 Dan Carpenter 提交于
There was a missing break statement so we set everything to PKT_HASH_TYPE_L3 even when we intended to use PKT_HASH_TYPE_L4. Fixes: 5b9dfe29 ('amd-xgbe: Provide support for receive side scaling') Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 11月, 2014 6 次提交
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由 Lendacky, Thomas 提交于
This patch adds support for ethtool receive side scaling (RSS) commands. Support is added to get/set the RSS hash key and the RSS lookup table. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
This patch provides support for receive side scaling (RSS). RSS allows for spreading incoming network packets across the Rx queues. When used in conjunction with the per DMA channel interrupt support, this allows the receive processing to be spread across multiple processors. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
This patch provides support for interrupts that are generated by the Tx/Rx DMA channel pairs of the device. This allows for Tx and Rx processing to run across multiple processsors. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Provide support for splitting IP packets so that the header and payload can be sent to different DMA addresses. This will allow the IP header to be put into the linear part of the skb while the payload can be added as frags. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Use page allocations for Rx buffers instead of pre-allocating skbs of a set size. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
The pre_xmit function name implies that it performs operations prior to transmitting the packet when in fact it is responsible for setting up the descriptors and initiating the transmit. Rename this to function from pre_xmit to dev_xmit, which is consistent with the name used during receive processing - dev_read. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 9月, 2014 3 次提交
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由 Lendacky, Thomas 提交于
As the management counters reach a threshold they will generate an interrupt so the value can be saved and the counter reset. The current code does not enable this interrupt on all counters. This can result in inaccurate statistics. Update the code to enable all the counters to generate an interrupt when its threshold is exceeded. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
Even if the management counters are configured to be 32 bit register values, the [rt]xoctetcount_gb and [rt]xoctetcount_g counters are always 64 bit counter registers. Since they are not being treated as 64 bit values, these statistics are being reported incorrectly (ifconfig, ethtool, etc.). Update the routines used to read the registers to access the "hi" register (an offset of 4 from the "lo" register) to create a 64 bit value for these 64 bit counters. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
This patch contains fixes identified by checkpatch when run with the strict option. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 9月, 2014 3 次提交
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由 Lendacky, Thomas 提交于
When configuring Tx flow control the Rx queue count was used instead of the Tx queue count for looping through the Tx hardware queues. Fix the code to use the Tx queue count. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
The fifo size reported by the hardware is not correct. Add support to limit the reported size to what is actually present. Also, fix the argument types used in the fifo size calculation function. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
The flushing of the Tx hardware queues is only supported at a certain level of the hardware. Retrieve the current version of the hardware and use that to determine if flushing is supported. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 31 7月, 2014 3 次提交
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由 Lendacky, Thomas 提交于
This patch adds support for traffic classes as well as support for Data Center Bridging interfaces related to traffic classes and priority flow control. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
When setting the fifo sizes for the queues and enabling the queues use the number of active Tx and Rx queues that have been enabled not the maximum number available. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
This patch adds support for Tx and Rx hardware timestamping. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 7月, 2014 2 次提交
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由 Lendacky, Thomas 提交于
The default cache operations for ARM64 were changed during 3.15. To use coherent operations a "dma-coherent" device tree property is required. If that property is not present in the device tree node then the non-coherent operations are assigned for the device. Add support to the amd-xgbe driver to assign the AXI DMA cache settings based on whether the "dma-coherent" property is present in the device node. If present, use settings that work with the caches. If not present, use settings that do not look at the caches. Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Lendacky, Thomas 提交于
This patch provides some general performance enhancements for the driver: - Modify the default coalescing settings (reduce usec, increase frames) - Change the AXI burst length to 256 bytes (default was 16 bytes which was smaller than a cache line) - Change the AXI cache settings to write-back/write-allocate which allocate cache entries for received packets during the DMA since the packet will be processed soon afterwards - Combine ioread/iowrite when disabling both the Tx and Rx interrupts - Change to processing the Tx/Rx channels in pairs - Only recycle the Rx descriptors when a threshold of dirty descriptors is reached Signed-off-by: NTom Lendacky <thomas.lendacky@amd.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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