the FPGA on the TS-7800 provides access to a number of devices
and so we have to be careful when reprogramming it.  As we
are effectively turning a bus off/on we have to inform the
kernel that it should stop using anything provided by the
FPGA (currently only the RTC however the NAND, LCD, etc is
to come) before it's reprogrammed.

Once reprogramed, we can tell the kernel to (re)enable things
by checking the FPGA ID against a lookup table for what a
particular FPGA bitstream can provide.
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>

moved the MPP comments to the mpp area of the platform code
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>

The TS-7800's M25P40 is not available to the kernel, it's used
to load the initial bitstream onto the FPGA and so these hooks
point to nothing and need to be removed.
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>

The TS-7800 can have a M48T86 RTC onboard
Signed-off-by: NAlexander Clouter <alex@digriz.org.uk>

Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Split off Orion GPIO IRQ handling code into plat-orion/.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

Split off Orion GPIO handling code into plat-orion/, and add
support for multiple sets of (32) GPIO pins.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

as per 0560cf5aSigned-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Select CPU_V6 with the S3C64XX series.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

When CONFIG_PM is selected, the VFP code does not have any handler
installed to deal with either saving the VFP state of the current
task, nor does it do anything to try and restore the VFP after a
resume.

On resume, the VFP will have been reset and the co-processor access
control registers are in an indeterminate state (very probably the
CP10 and CP11 the VFP uses will have been disabled by the ARM core
reset). When this happens, resume will break as soon as it tries to
unfreeze the tasks and restart scheduling.

Add a sys device to allow us to hook the suspend call to save the
current thread state if the thread is using VFP and a resume hook
which restores the CP10/CP11 access and ensures the VFP is disabled
so that the lazy swapping will take place on next access.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

As per Russell King's last review comment, find and remove
all unnecessary includes of <linux/delay.h> in the files
that do not need them.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The commit 39263db7986bf15c753f6847699107bdf5a2e318 added
a default <mach/io.h> implementation which is shared if
needed between all the s3c implementations. Remove the
s3c24a0 version which is the same as this.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

The changes for ARM highmem support have removed the need
for the __virt_to_bus and __bus_to_virt macros, so remove them
from this build.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add the fourth UART definition for the S3C2443, and at the
same time fixup the problems caused by the enlarging of the
UART array in the previous commits.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Fix the usage of CONFIG_SERIAL_SAMSUNG_UARTS in several places
in the kernel where it had been missed. This finishes fixing a
long standing issue where S3C2443 and S3C64XX could not use the
4th UART
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Instead of including other header files, define PHYS_OFFSET directly
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Instead of including other header files, define CLOCK_TICK_RATE directly
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch removes the inclusion of mach/hardware.h from mach/irqs.h and
switches to more meaningful names for the irq related macros.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch adds a missing call to local_irq_restore() and fixes some
compiler warnings about unused variables for MX1.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Add LCD frame buffer support for AT2440EVB board.
Signed-off-by: NRamax Lo <ramaxlo@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add SD/MMC support for AT2440EVB board.
Signed-off-by: NRamax Lo <ramaxlo@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add GPIO support to the SM501 on the Simtec Anubis,
and then add the necessary updates for allowing the
two gpio I2C busses to be used.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add Kconfig entries to allow more GPIO space to
be specified depending on the machine(s) selected.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Fix the name of the driver, as well as the fact we are not
passing the number of chipselects to the driver.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

A common core driver for the S3C24XX ADC block so that
the touchscreen, hwmon and any other drivers can share
the resource.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

The MX1 only has one possible CPU type, ARM920T. Select it in
Kconfig.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

rename imxfb_mach_info to a name more common to kernel hackers
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch prepares the current i.MX1 framebuffer driver for usage in the
whole i.MX family. It switches to readl/writel for register accesses.
Also it moves the register definitions to the driver where they belong.
Acked-by: NKrzysztof Helt <krzysztof.h1@poczta.fm>
Signed-off-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NClaudio Scordino <claudio@evidence.eu.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Drivers which are going to use it will have to select it and use
mxc_set_irq_fiq() to set FIQ mode for this interrupt.
Signed-off-by: NPaulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Adds MTD XIP support for ARCH_MX1.
Signed-off-by: NDarius Augulis <augulis.darius@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Adds common devices to ARCH_MX1.
Signed-off-by: NDarius Augulis <augulis.darius@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Adds MX1 architecture to platform MXC. It will supersede mach-imx
and let it die.
Signed-off-by: NPaulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: NDarius Augulis <augulis.darius@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Fix GIUS register setup in the mxc_gpio_mode().
Signed-off-by: NDarius Augulis <augulis.darius@gmail.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Initial support for mx31moboard platfor with 3 serial ports
and NOR Flash
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

pins definition for UART5 when used in alternate mode 2
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

UART2 pins when used in functionnal mode
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>