- 17 9月, 2019 3 次提交
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由 Mikita Lipski 提交于
[why] The issue is specific for linux, as on timings such as 8K@60 or 4K@144 DSC should be working in combination with ODM Combine in order to ensure that we can run those timings. The validation for those timings was passing, but when pipe split was happening second pipe wasn't being programmed. [how] Rebuild mapped resources if we split stream for ODM. Signed-off-by: NMikita Lipski <mikita.lipski@amd.com> Acked-by: NLeo Li <sunpeng.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aric Cyr 提交于
Signed-off-by: NAric Cyr <aric.cyr@amd.com> Acked-by: NLeo Li <sunpeng.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ilya Bakoulin 提交于
[Why] Secondary viewport dimension/position registers are not programmed, which can cause issues in some stereo configurations. [How] Add register definitions and register programming. Signed-off-by: NIlya Bakoulin <Ilya.Bakoulin@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NLeo Li <sunpeng.li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 9月, 2019 2 次提交
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由 Colin Ian King 提交于
There is a spelling mistake in the variable name eanble, rename it to enable. Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
[Why] we only want the lowest voltage to be available for dali. [How] Use the get_highest_allowed_voltage_level function to return 0 for dali Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 14 9月, 2019 18 次提交
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由 Qingqing Zhuo 提交于
Signed-off-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jing Zhou 提交于
[Why] DP1.2 LL CTS test failure. [How] The failure is caused by not verify stream link is equal to link, only check stream and link is not null. Signed-off-by: NJing Zhou <Jing.Zhou@amd.com> Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Charlene Liu 提交于
[Description] 1. OUTSTANDING_REQUEST_LIMIT update from 0xFF to 0x1F (HW doc update) 2. using memory type to convert UMC's MCLK to Yclk. Signed-off-by: NCharlene Liu <charlene.liu@amd.com> Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bayan Zabihiyan 提交于
[Why] Edid Utility wishes to include DSC module from driver instead of doing it's own logic which will need to be updated every time someone modifies the driver logic. [How] Modify some functions such that we dont need to pass the entire DC structure as parameter. -Remove DC inclusion from module. -Filter out problematic types and inclusions Signed-off-by: NBayan Zabihiyan <bayan.zabihiyan@amd.com> Reviewed-by: NJun Lei <Jun.Lei@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jaehyun Chung 提交于
[Why] Underflow occurs on some display setups(repro'd on 3x4K HDR) on boot, mode set, and hot-plugs with. Underflow occurs because mem clk is not set high after disabling pstate switching. This behaviour occurs because some calculations assumed displays were synchronized. [How] Add a condition to check if timing sync is disabled so that synchronized vblank can be set to false. Signed-off-by: NJaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jun Lei 提交于
[why] dc_destroy should only clean up SW, this is because GPUs may be removed before driver unload, leading to HW to be unavailable. [how] remove GPIO close as part of GPIO destroy, this is unnecessary because GPIO is not shared, and GPIOs are generally closed after being opened Add tracking to HW access during destructor to make future issues easier to pinpoint, and block access to prevent hangs. Signed-off-by: NJun Lei <Jun.Lei@amd.com> Reviewed-by: NYongqiang Sun <yongqiang.sun@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Vitaly Prosyak 提交于
[Why & How] Use dcn2 blender, shaper, 3dlut registers Signed-off-by: NVitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Acked-by: NVitaly Prosyak <Vitaly.Prosyak@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dmytro Laktyushkin 提交于
Remove code used to allow compilation error free interface change. Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Dmytro Laktyushkin 提交于
New behaviour will track global updates and update any hw that isn't related to current stream being updated. This should fix any issues caused by pipe split pipes being taken by other streams. Signed-off-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ilya Bakoulin 提交于
[Why] - Need to add missing surface address register definitions. - RGBE+A does not work in a stereo configuration because surface addresses are no programmed correctly. [How] Added the register definitions and surface address programming. Signed-off-by: NIlya Bakoulin <Ilya.Bakoulin@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Anthony Koo 提交于
Signed-off-by: NAnthony Koo <Anthony.Koo@amd.com> Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nikola Cornij 提交于
[why] It's sometimes useful to have this option when debugging [how] Add a config flag. If the flag is not set, use driver default policy. If the flag is set, use the value from the flag as the starting DSC slice height. Signed-off-by: NNikola Cornij <nikola.cornij@amd.com> Reviewed-by: NMartin Leung <Martin.Leung@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nikola Cornij 提交于
[why] The requirement has been clarified and only DSC 4:2:2 Native has to be disabled. Signed-off-by: NNikola Cornij <nikola.cornij@amd.com> Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alvin Lee 提交于
We should not allocate payloads if the link is lost until the link is retrained. Some displays require this. Signed-off-by: NAlvin Lee <alvin.lee2@amd.com> Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Krunoslav Kovac 提交于
[Why&How] Driver defaults to 1-tap subsample mode for 4:2:2. DCE11.2 added 3-tap. The policy is: DCE8-DCE11 - change to 2-tap, it's better than 1-tap. DCE11.2+ - use 3-tap Note that 4:2:0 was added in DCE11.2 and already uses 3-tap always. Note 2 is that DCE not covered on Linux, only DCN+ Signed-off-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Lewis Huang 提交于
[Why] When user mode use i2c over aux through ADL or DDI, the function dal_ddc_service_query_ddc_data will be called. There are two issues. 1. When read/write length > 16byte, current always return false because the DEFAULT_AUX_MAX_DATA_SIZE != length. 2. When usermode only need to read data through i2c, driver will write mot = true at the same address and cause i2c sink confused. Therefore the following read command will get garbage. [How] 1. Add function dal_dcc_submit_aux_command to handle length > 16 byte. 2. Check read size and write size when query ddc data. Signed-off-by: NLewis Huang <Lewis.Huang@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ilya Bakoulin 提交于
[Why] DML diags tests are failing because the struct contents get clobbered by a memcpy. [How] Remove the memcpy call. Signed-off-by: NIlya Bakoulin <Ilya.Bakoulin@amd.com> Reviewed-by: NDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
[Why] The earlier patch "Hook up calls to do stereo mux and dig programming..." doesn't include update for dcn21. [How] Align dcn21 gpio settings with updated stereo control interface. Signed-off-by: NRoman Li <Roman.Li@amd.com> Acked-by: NAaron Liu <aaron.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 30 8月, 2019 17 次提交
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由 Roman Li 提交于
Hook up the DML changes for renoir. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NRoman Li <Roman.Li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
Need to check for renoir first. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NRoman Li <Roman.Li@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Enable the building of dcn21 support. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Add missing parameters, to make dcn21 compile without errors Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
call update_bw_bounding_box in DC construct Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
add Renoir DCN version in DC and handle it Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
rename VM_CONTEXT0 to MMVM_CONTEXT0 as that is the name defined in the register files Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
DML provides the display configuration validation as provided by the hw teams. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Misc display related configuration details. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Manages the renoir display resources (crtcs, phys, plls, etc.). v2: rebase (Alex) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Controls display clocks and interfaces with powerplay for clock and power requirements. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Controls the display hw's interface to memory. v2: rebase (Alex) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
These are the registers used to program the hubbub hw. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
This provides the interface to memory for the display hw. v2: minor cleanup (Alex) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
Provides the interface to configure display interrrupts on renoir. v2: rebase fix (Alex) Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
This defines the interface for communicating requirements between DC and powerplay. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bhawanpreet Lakha 提交于
These are the registers used to for the hw sequences for modesetting. Acked-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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