1. 25 5月, 2015 5 次提交
  2. 20 5月, 2015 1 次提交
  3. 10 5月, 2015 1 次提交
  4. 07 5月, 2015 2 次提交
  5. 11 3月, 2015 1 次提交
  6. 07 3月, 2015 3 次提交
    • J
      drivers/tty: amba: defer DMA probe until the DMA channel is required. · 1c9be310
      Jorge Ramirez-Ortiz 提交于
      Fix a race condition that happens when device_initcall(pl011_dma_initicall)
      is executed before all the devices have been probed - this issue was observed on
      a hisi_6220 SoC (HiKey board from Linaro).
      
      The deferred driver probing framework relies on late_initcall to trigger
      deferred probes so it is just possible that, even with a valid DMA driver ready
      to be loaded, we fail to synchronize with it.
      
      The proposed implementation delays probing the DMA until dma_startup.
      
      As this is invoked on port startup and port resume - but DMA probing is only
      required once - we avoid calling multiple times using a new field in
      uart_amba_port to track this scenario.
      
      This commit allows for subsequent attempts to associate an external DMA if the
      DMA driver itself is not available (but present in the deferred probe pending
      list).
      Signed-off-by: NJorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
      Reviewed-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      1c9be310
    • D
      serial/amba-pl011: Leave the TX IRQ alone when the UART is not open · f2ee6dfa
      Dave Martin 提交于
      Getting the TX IRQ re-asserted from scratch can be inefficient in
      some setups.
      
      This patch avoids clearing the TX IRQ across pl011_shutdown()...
      pl011_startup(), so that if the port is closed and reopened, the
      IRQ will still work afterwards without having to bootstrap it again.
      
      The TX IRQ continues to be masked in IMSC when the UART is not in
      use.
      Signed-off-by: NDave Martin <Dave.Martin@arm.com>
      Tested-by: NAndre Przywara <andre.przywara@arm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      f2ee6dfa
    • D
      serial/amba-pl011: Activate TX IRQ passively · 734745ca
      Dave Martin 提交于
      The current PL011 driver transmits a dummy character when the UART
      is opened, to assert the TX IRQ for the first time
      (see pl011_startup()).  The UART is put in loopback mode temporarily,
      so the receiver presumably shouldn't see anything.
      
      However...
      
      At least some platforms containing a PL011 send characters down the
      wire even when loopback mode is enabled.  This means that a
      spurious NUL character may be seen at the receiver when the PL011 is
      opened through the TTY layer.
      
      The current code also temporarily sets the baud rate to maximum and
      the character width to the minimum, to that the dummy TX completes
      as quickly as possible.  If this is seen by the receiver it will
      result in a framing error and can knock the receiver out of sync --
      turning subsequent output into garbage until synchronisation
      is reestablished.  (Particularly problematic during boot with systemd.)
      
      To avoid spurious transmissions, this patch removes assumptions about
      whether the TX IRQ will fire until at least one TX IRQ has been seen.
      
      Instead, the UART will unmask the TX IRQ and then slow-start via
      polling and timer-based soft IRQs initially.  If the TTY layer writes
      enough data to fill the FIFO to the interrupt threshold in one go,
      the TX IRQ should assert, at which point the driver changes to
      fully interrupt-driven TX.
      
      In this way, the TX IRQ is activated as a side-effect instead of
      being done deliberately.
      
      This should also mean that the driver works on the SBSA Generic
      UART[1] (a cut-down PL011) without invasive changes.  The Generic
      UART lacks some features needed for the dummy TX approach to work
      (FIFO disabling and loopback).
      
      [1] Server Base System Architecture (ARM-DEN-0029-v2.3)
          http://infocenter.arm.com/
          (click-thru required :/)
      Signed-off-by: NDave Martin <Dave.Martin@arm.com>
      Tested-by: NAndre Przywara <andre.przywara@arm.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      734745ca
  7. 08 11月, 2014 5 次提交
  8. 07 11月, 2014 1 次提交
  9. 06 11月, 2014 1 次提交
    • P
      serial: Refactor uart_flush_buffer() from uart_close() · 479e9b94
      Peter Hurley 提交于
      In the context of the final tty & port close, flushing the tx
      ring buffer after the hardware has already been shutdown and
      the ring buffer freed is neither required nor desirable.
      
      uart_flush_buffer() performs 3 operations:
      1. Resets tx ring buffer indices, but the tx ring buffer has
         already been freed and the indices are reset if the port is
         re-opened.
      2. Calls uart driver's flush_buffer() method
         5 in-tree uart drivers define flush_buffer() methods:
           amba-pl011, atmel-serial, imx, serial-tegra, timbuart
         These have been refactored into the shutdown() method, if
         required.
      3. Kicks the ldisc for more writing, but this is undesirable.
         The file handle is being released; any waiting writer will
         will be kicked out by tty_release() with a warning. Further,
         the N_TTY ldisc may generate SIGIO for a file handle which
         is no longer valid.
      
      Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Laxman Dewangan <ldewangan@nvidia.com>
      Signed-off-by: NPeter Hurley <peter@hurleysoftware.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      479e9b94
  10. 09 9月, 2014 1 次提交
  11. 10 7月, 2014 1 次提交
  12. 20 6月, 2014 1 次提交
    • P
      serial: Fix IGNBRK handling · ef8b9ddc
      Peter Hurley 提交于
      If IGNBRK is set without either BRKINT or PARMRK set, some uart
      drivers send a 0x00 byte for BREAK without the TTYBREAK flag to the
      line discipline, when it should send either nothing or the TTYBREAK flag
      set. This happens because the read_status_mask masks out the BI
      condition, which uart_insert_char() then interprets as a normal 0x00 byte.
      
      SUS v3 is clear regarding the meaning of IGNBRK; Section 11.2.2, General
      Terminal Interface - Input Modes, states:
        "If IGNBRK is set, a break condition detected on input shall be ignored;
         that is, not put on the input queue and therefore not read by any
         process."
      
      Fix read_status_mask to include the BI bit if IGNBRK is set; the
      lsr status retains the BI bit if a BREAK is recv'd, which is
      subsequently ignored in uart_insert_char() when masked with the
      ignore_status_mask.
      
      Affected drivers:
      8250 - all
      serial_txx9
      mfd
      amba-pl010
      amba-pl011
      atmel_serial
      bfin_uart
      dz
      ip22zilog
      max310x
      mxs-auart
      netx-serial
      pnx8xxx_uart
      pxa
      sb1250-duart
      sccnxp
      serial_ks8695
      sirfsoc_uart
      st-asc
      vr41xx_siu
      zs
      sunzilog
      fsl_lpuart
      sunsab
      ucc_uart
      bcm63xx_uart
      sunsu
      efm32-uart
      pmac_zilog
      mpsc
      msm_serial
      m32r_sio
      
      Unaffected drivers:
      omap-serial
      rp2
      sa1100
      imx
      icom
      
      Annotated for fixes:
      altera_uart
      mcf
      
      Drivers without break detection:
      21285
      xilinx-uartps
      altera_jtaguart
      apbuart
      arc-uart
      clps711x
      max3100
      uartlite
      msm_serial_hs
      nwpserial
      lantiq
      vt8500_serial
      
      Unknown:
      samsung
      mpc52xx_uart
      bfin_sport_uart
      cpm_uart/core
      
      Fixes: Bugzilla #71651, '8250_core.c incorrectly handles IGNBRK flag'
      Reported-by: NIvan <athlon_@mail.ru>
      Signed-off-by: NPeter Hurley <peter@hurleysoftware.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      ef8b9ddc
  13. 21 5月, 2014 1 次提交
  14. 25 4月, 2014 1 次提交
  15. 17 4月, 2014 2 次提交
  16. 14 2月, 2014 1 次提交
  17. 18 12月, 2013 6 次提交
  18. 09 12月, 2013 3 次提交
  19. 04 10月, 2013 1 次提交
  20. 13 8月, 2013 1 次提交
  21. 01 8月, 2013 1 次提交