- 06 7月, 2016 7 次提交
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由 Sara Sharon 提交于
Centralize the logging of SCD status. The motivation is that for a000 devices we will have new SCD HW, but this code was duplicate anyway, so it is a proper cleanup. Signed-off-by: NSara Sharon <sara.sharon@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Sara Sharon 提交于
Update the firmware load flow for TFH hardware. Signed-off-by: NSara Sharon <sara.sharon@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Emmanuel Grumbach 提交于
Upon firmware load interrupt (FH_TX), the ISR re-enables the firmware load interrupt only to avoid races with other flows as described in the commit below. When the firmware is completely loaded, the thread that is loading the firmware will enable all the interrupts to make sure that the driver gets the ALIVE interrupt. The problem with that is that the thread that is loading the firmware is actually racing against the ISR and we can get to the following situation: CPU0 CPU1 iwl_pcie_load_given_ucode ... iwl_pcie_load_firmware_chunk wait_for_interrupt <interrupt> ISR handles CSR_INT_BIT_FH_TX ISR wakes up the thread on CPU0 /* enable all the interrupts * to get the ALIVE interrupt */ iwl_enable_interrupts ISR re-enables CSR_INT_BIT_FH_TX only /* start the firmware */ iwl_write32(trans, CSR_RESET, 0); BUG! ALIVE interrupt will never arrive since it has been masked by CPU1. In order to fix that, change the ISR to first check if STATUS_INT_ENABLED is set. If so, re-enable all the interrupts. If STATUS_INT_ENABLED is clear, then we can check what specific interrupt happened and re-enable only that specific interrupt (RFKILL or FH_TX). All the credit for the analysis goes to Kirtika who did the actual debugging work. Cc: <stable@vger.kernel.org> [4.5+] Fixes: a6bd005f ("iwlwifi: pcie: fix RF-Kill vs. firmware load race") Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Johannes Berg 提交于
The PCIe transport needs to store two pointers in each TX SKB, and currently assumes mac80211's ieee80211_tx_info is present in the CB to do that. In order to remove that assumption, have the opmodes pass in the offset to where the pointers can be stored in the CB and use the offset in the PCIe code. To make the disentanglement complete, remove mac80211.h includes from everywhere in the generic iwlwifi code. This required adding an include of cfg80211.h in one place. Signed-off-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Ido Yariv 提交于
On some of the chipsets MSI & INTA interrupts are disabled by default in the HW registers, and need to be explicitly enabled to be used. In case MSI-X isn't used, make sure MSI mode is enabled by setting the relevant HW register. Signed-off-by: NIdo Yariv <idox.yariv@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Emmanuel Grumbach 提交于
The NIC's CPU gets started after the firmware has been written to its memory. The first thing it does is to send an interrupt to let the driver know that it is running. In order to get that interrupt, the driver needs to make sure it is not masked. Of course, the interrupt needs to be enabled in the driver before the CPU starts to run. I mistakenly inversed those two steps leading to races which prevented the driver from getting the alive interrupt from the firmware. Fix that. Cc: <stable@vger.kernel.org> [4.5+] Fixes: a6bd005f ("iwlwifi: pcie: fix RF-Kill vs. firmware load race") Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Liad Kaufman 提交于
Support DQA queue sharing when no free queue exists for allocation to a STA that already exists. This means that a single queue will serve more than a single TID (although the RA will be the same for all TIDs served). We try to choose the lowest AC possible, to ensure the shared queues have the lowest possible combined AC requirements. The queue to share is chosen only from the same RA's DATA queues as follows (in descending priority): 1. An AC_BE queue 2. Same AC queue 3. Highest AC queue that is lower than new AC 4. Any existing AC (there always is at least 1 DATA queue) If any aggregations existed for any of the TIDs of the shared queue - they are stopped (the FW is notified), but no delBA is sent. Signed-off-by: NLiad Kaufman <liad.kaufman@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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- 01 7月, 2016 1 次提交
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由 Sara Sharon 提交于
Integrated 9000 devices have a bug with shadow registers value retention. If driver writes RBD registers while MAC is asleep the values are stored in shadow registers to be copied whenever MAC wakes up. However, in 9000 devices a MAC wakeup is not triggered and when the bus powers down due to inactivity the shadow values and dirty bits are lost. Turn on the chicken-bits that cause MAC wakeup for RX-related values as well when the device is in D0. When the device is in low power mode turn the RX wakeup chicken bits off since driver is idle and this W/A is not needed. Remove previous W/A which was ineffective. Signed-off-by: NSara Sharon <sara.sharon@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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- 11 5月, 2016 5 次提交
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由 Johannes Berg 提交于
Since msleep is based on jiffies, it can sleep for a long time. Use usleep_range() instead to shorten the maximum time. Signed-off-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Johannes Berg 提交于
Newer hardware generations will take longer to be accessible again after reset, so we need to wait longer before continuing any flow that did a reset. Rather than make the wait time configurable, simply extend it for all. Since all of these code paths can sleep, use usleep_range() rather than mdelay(). Signed-off-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Johannes Berg 提交于
Since we have a lot of configuration structs (almost 70) saving some memory in each one of them leads to an overall saving of ~2.6KiB of memory. Signed-off-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Haim Dreyfuss 提交于
Currently there is one to one function between device id to it's ucode. The new generation devices allows to combine different phy and mac images. Now we have two different ucode images with the same device id. Read RF ID to identify phy image and overwrite it if needed. Signed-off-by: NHaim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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由 Luca Coelho 提交于
It's cleaner to always call the iwl_trans_ref/unref() functions instead of sometimes calling the trans-specific ops directly. This also prepares for moving some of the code from the trans-specific ops to the common trans code. Signed-off-by: NLuca Coelho <luciano.coelho@intel.com> Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
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- 30 3月, 2016 6 次提交
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由 Haim Dreyfuss 提交于
In MSIX mode we iterate over the allocated interrupt vectors and register them to an handler. In case of registration failure, we free all the allocated irq. we use the outer index mistakenly instead of the inner one. Signed-off-by: NHaim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Sara Sharon 提交于
We want to request an interrupt vector for RSS queue per CPU, one vector for fallback queue, and one for non-rx interrupts. Future patch will make sure that no RSS traffic is directed to fallback queue. This will enable us to enable fast path on traffic that otherwise would have been received on the fallback queue. Signed-off-by: NSara Sharon <sara.sharon@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
iwlwifi / iwlmvm didn't destroy their mutexes. Fix that. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
Bjorn pointed out that printing an error value as an hexadecimal isn't very convenient. Change that. Reported-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Luca Coelho 提交于
We don't use the refcount value anymore, all the refcounting is done in the runtime PM usage_count value. Remove it. Signed-off-by: NLuca Coelho <luciano.coelho@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Sara Sharon 提交于
When entering suspend the driver calls iwl_disable_interrupts() and then iwl_pcie_disable_ict(). On resume the driver calls only iwl_pcie_reset_ict() without calling explicitly to iwl_enable_interrupts(). This mostly works since iwl_pcie_reset_ict is calling to iwl_enable_interrupts, but it doesn't work when there is no ict_table in MSIx mode. The result is that driver tries to resume but fails since it doesn't get the RX interrupt from FW indicating that d0i3 exit was completed. Fix it by adding an explicit call to enable interrupts. Signed-off-by: NSara Sharon <sara.sharon@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 20 3月, 2016 1 次提交
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由 Emmanuel Grumbach 提交于
IWL_INFO is not an error but still printed by default. "can't access the RSA semaphore it is write protected" seems worrisome but it is not really a problem. CC: <stable@vger.kernel.org> [4.1+] Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 07 3月, 2016 1 次提交
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由 Luca Coelho 提交于
The pci driver keeps any unbound device in active state and forbids runtime PM. When our driver gets probed, we take control of the state. When the device is released (i.e. during unbind or module removal), we should return the state to what it was before. To do so, we need to forbid RTPM in the driver remove op. Additionally, remove an unnecessary pm_runtime_disable() call, move the initial ref_count setting to a better place and add some comments explaining what is going on. Signed-off-by: NLuca Coelho <luciano.coelho@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 28 2月, 2016 3 次提交
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由 Emmanuel Grumbach 提交于
A curly brace was misplaced, fix this. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Haim Dreyfuss 提交于
Working with MSIX requires prior configuration. This includes requesting interrupt vectors from the OS, registering the vectors and mapping the optional causes to the relevant interrupt. In addition add new interrupt handler to handle MSIX interrupt. Signed-off-by: NHaim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
Instead of waking up the device each time we write a register, wake it up once, and writes the registers at once. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 15 2月, 2016 2 次提交
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由 Anton Protopopov 提交于
The iwl_trans_pcie_start_fw() function may return the positive value EIO instead of -EIO in case of error. Signed-off-by: NAnton Protopopov <a.s.protopopov@gmail.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
When we load the firmware, we hold trans_pcie->mutex to avoid nested flows. We also rely on the ISR to wake up the thread when the DMA has finished copying a chunk. During this flow, we enable the RF-Kill interrupt. The problem is that the RF-Kill interrupt handler can take the mutex and bring the device down. This means that if we load the firmware while the RF-Kill switch is enabled (which will happen when we load the INIT firmware to read the device's capabilities and register to mac80211), we may get an RF-Kill interrupt immediately and the ISR will be waiting for the mutex held by the thread that is currently loading the firmware. At this stage, the ISR won't be able to service the DMA's interrupt needed to wake up the thread that load the firmware. We are in a deadlock situation which ends when the thread that loads the firmware fails on timeout and releases the mutex. To fix this, take the mutex later in the flow, disable the interrupts and synchronize_irq() to give a chance to the RF-Kill interrupt to run and complete. After that, mask all the interrupts besides the DMA interrupt and proceed with firmware load. Make sure to check that there was no RF-Kill interrupt when the interrupts were disabled. This fixes https://bugzilla.kernel.org/show_bug.cgi?id=111361Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 01 2月, 2016 4 次提交
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由 Sara Sharon 提交于
Previous patches enabled new 9000 hardware DMA for one queue only. Enable the actual multi-queue path and configuration now. This requires also per-queue NAPI struct. Signed-off-by: NSara Sharon <sara.sharon@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Matti Gottlieb 提交于
Currently when the driver is configured with wowlan parameters, and enters D3 mode, the driver switches the FW image to D3, and when it exists suspend, it reloads the D0 image. If the firmware supports the consolidation of the D0 & D3 images there is no need to load the D3 image on suspend, and no need to reload the D0 image on resume. Do not switch images on suspend / resume, for firmwares that support consolidated images. Signed-off-by: NMatti Gottlieb <matti.gottlieb@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Luciano Coelho 提交于
Enable runtime power management (RTPM) for PCIe devices and implement the corresponding functions to enable D0i3 mode when the device is idle. Additionally, remove some unnecessary #ifdef's because the RTPM code will not be called if runtime PM is not configured. Signed-off-by: NLuca Coelho <luciano.coelho@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Luca Coelho 提交于
Add an initial implementation of runtime power management (RTPM) for PCI devices. With this patch, RTPM is only used when wifi is off (i.e. the wifi interface is down). This implementation is behind a new Kconfig flag, IWLWIFI_PCIE_RTPM. Signed-off-by: NLuca Coelho <luciano.coelho@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 31 1月, 2016 2 次提交
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由 Sara Sharon 提交于
The 9000 series introduces several changes in the device DMA operation. As the device now supports multi-queue rx, several DMA channels should be configured. The flows of providing the device with the allocated RBDs now changes as well - the device maintains a separate table of used and free table. The hardware may use the free table to feed RBDs to any queue. This requires maintaing a shared table to map returned RBDs to the original RXB - for that purpose the VID is introduced - an internal identifier of the RB placed in the lower 12 bits and returned by HW in the used data. Another change is the support of 64 bit DMA address. Signed-off-by: NSara Sharon <sara.sharon@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Sara Sharon 提交于
The 9000 series devices will support multi rx queues. Current code has one static rx queue - change it to allocate a number of queues per the device capability (pre-9000 devices have the number of rx queues set to one). Subsequent generalizations are: Change the code to access an explicit numbered rx queue only when the queue number is known - when handling interrupt, when accessing the default queue and when iterating the queues. The rest of the functions will receive the rx queue as a pointer. Generalize the warning in allocation failure to consider the allocator status instead of a single rx queue status. Move the rx initial pool of memory buffers to be shared among all the queues and allocated to the default queue on init. Signed-off-by: NSara Sharon <sara.sharon@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 08 1月, 2016 2 次提交
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由 Emmanuel Grumbach 提交于
8000 device family has a new debug engine that needs to be configured differently than 7000's. The debug engine's DMA works in chunks of memory and the size of the buffer really means the start of the last chunk. Since one chunk is 256-byte long, we should configure the device to write to buffer_size - 256. This fixes a situation were the device would write to memory it is not allowed to access. CC: <stable@vger.kernel.org> [4.1+] Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
The debug functions of fw-dbg.c don't really need to modify the trigger and the description they receive as a parameter. Constify the pointers. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 21 12月, 2015 2 次提交
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由 Emmanuel Grumbach 提交于
All the callers used silent = false. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
When the op_mode sends an skb whose payload is bigger than MSS, PCIe will create an A-MSDU out of it. PCIe assumes that the skb that is coming from the op_mode can fit in one A-MSDU. It is the op_mode's responsibility to make sure that this guarantee holds. Additional headers need to be built for the subframes. The TSO core code takes care of the IP / TCP headers and the driver takes care of the 802.11 subframe headers. These headers are stored on a per-cpu page that is re-used for all the packets handled on that same CPU. Each skb holds a reference to that page and releases the page when it is reclaimed. When the page gets full, it is released and a new one is allocated. Since any SKB that doesn't go through the fast-xmit path of mac80211 will be segmented, we can assume here that the packet is not WEP / TKIP and has a proper SNAP header. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 20 12月, 2015 2 次提交
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由 Emmanuel Grumbach 提交于
Allow to configure the driver to pretend to have TX CSUM offload support. This will be useful to test the TSO flows that will come in further patches. This configuration is disabled by default. Signed-off-by: NJohannes Berg <johannes.berg@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Emmanuel Grumbach 提交于
ilw@linux.intel.com is not available anymore. linuxwifi@intel.com should be used instead. Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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- 13 12月, 2015 2 次提交
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由 Luca Coelho 提交于
The d0i3_mode variable is used to distinguish between transports that handle d0i3 entry during suspend by themselves (i.e. the slave transports) and those which rely on the op_mode layer to do it. The reason why the former do it by themselves is that they need to transition from d0i3 in runtime_suspend into d0i3 in system-wide suspend and this transition needs to happen before the op_mode's suspend flow is called. The wowlan_d0i3 element is also a bit confusing, because it just reflects the wowlan->any value for the trans to understand. This is a bit unclear in the code and not generic enough for future use. To make it clearer and to generalize the platform power mode settings, introduce two variables to indicate the platform power management modes used by the transport. Additionally, in order not to take too big a step in one patch, treat this new variables semantically in the same way as the old d0i3_mode element, introducing a iwl_mvm_enter_d0i3_on_suspend() function to help with that. This commit also adds the foundation for a new concept where the firmware configuration state (i.e. D0, D3 or D0i3) is abstracted from the platform PM mode we are in (i.e. runtime suspend or system-wide suspend). Signed-off-by: NLuca Coelho <luciano.coelho@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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由 Sharon Dvir 提交于
Host commands now have a group id, express this in printed messages. Signed-off-by: NSharon Dvir <sharon.dvir@intel.com> Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
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