PRM driver now has a generic API for deasserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

PRM driver now has a generic API for asserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
Acked-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This helps to isolate the PRM into its own driver.
Signed-off-by: NTero Kristo <t-kristo@ti.com>

Done in preparation to make PRM its own driver, as the cpu_is_XXX calls are
not available outside mach-omap2 folder.

The init functions are called only from cpu specific init chain, and thus
don't need to double check against cpu type.

The exit calls check against the data provided during init-time registration
and thus don't need cpu check either.
Signed-off-by: NTero Kristo <t-kristo@ti.com>
[paul@pwsan.com: updated to apply]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

On OMAP2xxx chips, the register bitfields for the
PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED are
different than those used on OMAP3/4.  The order is reversed.  So, for
example, on OMAP2xxx, 0x0 indicates 'ON'; but on OMAP3/4, 0x0
indicates 'OFF'.  Similarly, on OMAP2xxx, 0x3 indicates 'OFF', but on
OMAP3/4, 0x3 indicates 'ON'.

To fix this, we treat the OMAP3/4 values as the powerdomain API
values, and create new low-level powerdomain functions for the
OMAP2xxx chips which translate between the OMAP2xxx values and the
OMAP3/4 values.

Without this patch, the conversion of the OMAP2xxx PM code to the
functional powerstate code results in a non-booting kernel.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

The cpu_is_omap macros are now local to arch/arm/mach-omap2
in soc.h and plat/cpu.h can finally be dropped for omap2+.
Thanks everybody for help with fixing the drivers.

Note that we can now also remove the unused plat/cpu.h from
smartreflex.c and isp.c as they will cause compile errors
with ARCH_MULTIPLATFORM enabled.

Cc: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: NJean Pihet <jean.pihet@newoldbits.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: NMauro Carvalho Chehab <mchehab@redhat.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Some PRM functions will need to be called by the hwmod code early in
kernel init.  To handle this, split the PRM initialization code into
early and late phases.  The early init is handled via mach-omap2/io.c,
while the late init is handled by subsys_initcall().
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

arch/arm/mach-omap2/prcm.c and arch/arm/plat-omap/include/plat/prcm.h
are now completely unused and can be removed.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NVaibhav Hiremath <hvaibhav@ti.com>

Add SoC reset functions into the PRM code.  These functions are based
on code from mach-omap2/prcm.c.  They reset the SoC using the CORE DPLL
reset method (as opposed to one of the other two or three chip reset
methods).

Adding them here will facilitate their removal from
arch/arm/mach-omap2/prcm.c.  (prcm.c is deprecated.)
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Tested-by: NVaibhav Hiremath <hvaibhav@ti.com>

The OMAP watchdog timer driver needs to determine what caused the SoC
to reset for its GETBOOTSTATUS ioctl.  So, define a set of standard
reset sources across OMAP SoCs.  For OMAP2xxx, 3xxx, and 4xxx SoCs,
define mappings from the SoC-specific reset source register bits to
the standardized reset source IDs.  Create SoC-specific PRM functions
that read the appropriate per-SoC register and use the mapping to
return the standardized reset bits.  Register the SoC-specific PRM
functions with the common PRM code via prm_register().  Create a
function in the common PRM code, prm_read_reset_sources(), that
calls the SoC-specific function, registered during boot.

This patch does not yet handle some SoCs, such as AM33xx.  Those SoCs
were not handled by the code this will replace.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>

Move the low-level SoC-specific clockdomain control functions into
cm*.c and prm*.c.  For example, OMAP2xxx low-level clockdomain
functions go into cm2xxx.c.  Then remove the unnecessary
clockdomain*xxx*.c files.

The objective is to centralize low-level CM and PRM register accesses
into the cm*.[ch] and prm*.[ch] files, and then to export an OMAP
SoC-independent API to higher-level OMAP power management code.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: NRajendra Nayak <rnayak@ti.com>
Reviewed-by: NRuss Dill <Russ.Dill@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>

Move the low-level SoC-specific powerdomain control functions into
prm*.c.  For example, OMAP2xxx low-level powerdomain functions go into
prm2xxx.c.  Then remove the unnecessary powerdomain*xxx*.c files.

The objective is to centralize low-level PRM register accesses into
the prm*.[ch] files, and then to export an OMAP SoC-independent API to
higher-level OMAP power management code.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: NRajendra Nayak <rnayak@ti.com>
Reviewed-by: NRuss Dill <Russ.Dill@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>