1. 15 11月, 2019 1 次提交
  2. 23 10月, 2019 1 次提交
  3. 16 7月, 2019 1 次提交
  4. 24 6月, 2019 1 次提交
  5. 29 4月, 2019 1 次提交
  6. 03 4月, 2019 1 次提交
  7. 22 3月, 2019 1 次提交
  8. 14 2月, 2019 2 次提交
  9. 26 1月, 2019 1 次提交
  10. 31 8月, 2018 2 次提交
  11. 26 7月, 2018 2 次提交
  12. 26 4月, 2018 1 次提交
  13. 03 11月, 2017 1 次提交
  14. 18 8月, 2017 1 次提交
  15. 10 8月, 2017 1 次提交
  16. 09 8月, 2017 1 次提交
  17. 29 6月, 2017 1 次提交
  18. 23 6月, 2017 1 次提交
  19. 02 6月, 2017 2 次提交
  20. 11 4月, 2017 1 次提交
  21. 07 2月, 2017 1 次提交
  22. 16 9月, 2016 1 次提交
  23. 01 7月, 2016 1 次提交
    • S
      iwlwifi: pcie: workaround HW shadow registers bug · 1316d595
      Sara Sharon 提交于
      Integrated 9000 devices have a bug with shadow registers
      value retention.
      If driver writes RBD registers while MAC is asleep the
      values are stored in shadow registers to be copied whenever
      MAC wakes up.
      However, in 9000 devices a MAC wakeup is not triggered
      and when the bus powers down due to inactivity the shadow
      values and dirty bits are lost.
      Turn on the chicken-bits that cause MAC wakeup for RX-related
      values as well when the device is in D0.
      When the device is in low power mode turn the RX wakeup chicken
      bits off since driver is idle and this W/A is not needed.
      Remove previous W/A which was ineffective.
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
      1316d595
  24. 11 5月, 2016 1 次提交
  25. 10 3月, 2016 1 次提交
  26. 28 2月, 2016 1 次提交
  27. 20 12月, 2015 1 次提交
  28. 18 11月, 2015 1 次提交
  29. 05 8月, 2015 1 次提交
    • M
      iwlwifi: mvm: Add FW paging mechanism for the UMAC on SDIO · e1120187
      Matti Gottlieb 提交于
      Family 8000 products has 2 embedded processors, the first
      known as LMAC (lower MAC) and implements the functionality from
      previous products, the second one is known as UMAC (upper MAC)
      and is used mainly for driver offloads as well as new features.
      The UMAC is typically “less” real-time than the LMAC and is used
      for higher level controls.
      The UMAC's code/data size is estimated to be in the mega-byte arena,
      taking into account the code it needs to replace in the driver and
      the set of new features.
      
      In order to allow the UMAC to execute code that is bigger than its code
      memory, we allow the UMAC embedded processor to page out code pages on
      DRAM.
      
      When the device is slave on the bus(SDIO) the driver saves the UMAC's
      image pages in blocks of 32K in the DRAM and sends the layout of the
      pages to the FW. When the FW wants load / unload pages, it creates an
      interrupt,	and the driver uploads / downloads the page to an address in
      the a specific address on the device's memory.
      
      The driver can support up to 1 MB of pages.
      
      Add paging mechanism for the UMAC on SDIO in order to allow the program to
      use a larger virtual space while using less physical memory on the device
      itself.
      Signed-off-by: NMatti Gottlieb <matti.gottlieb@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      e1120187
  30. 04 8月, 2015 1 次提交
  31. 22 1月, 2015 1 次提交
  32. 29 12月, 2014 1 次提交
  33. 24 11月, 2014 1 次提交
  34. 11 11月, 2014 1 次提交
  35. 14 9月, 2014 1 次提交
  36. 04 9月, 2014 1 次提交