- 18 12月, 2021 2 次提交
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由 Chris Packham 提交于
The CN9130-CRB boards have a MV88E6393X switch connected to eth0. Add the necessary dts nodes and properties for this. Signed-off-by: NChris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: NRussell King (Oracle) <rmk+kernel@armlinux.org.uk> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
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由 Chris Packham 提交于
Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a number of the peripheral devices to function. Signed-off-by: NChris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
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- 27 10月, 2021 5 次提交
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由 Marc Zyngier 提交于
At the moment, all the Minis running Linux have the same MAC address (00:10:18:00:00:00), which is a bit annoying. Expose the PCI node corresponding to the Ethernet device, and declare a 'local-mac-address' property. The bootloader will update it (m1n1 already has the required feature). And if it doesn't, then the default value is already present in the DT. This relies on forcing the bus number for each port so that the endpoints connected to them are correctly numbered (and keeps dtc quiet). Signed-off-by: NMarc Zyngier <maz@kernel.org> Signed-off-by: NHector Martin <marcan@marcan.st>
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由 Marc Zyngier 提交于
Add the interrupt-map properties that are required for INTx signalling. Tested-by: NAlyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by: NMarc Zyngier <maz@kernel.org> Signed-off-by: NHector Martin <marcan@marcan.st>
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由 Marc Zyngier 提交于
PCIe on the Apple M1 (aka t8103) requires the use of IOMMUs (aka DARTs). Add the three instances that deal with the internal PCIe ports and route each port's traffic through its DART. Signed-off-by: NMarc Zyngier <maz@kernel.org> Signed-off-by: NHector Martin <marcan@marcan.st>
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由 Mark Kettenis 提交于
Add node corresponding to the apcie,t8103 node in the Apple device tree for the Mac mini (M1, 2020). Power domain references and DART (IOMMU) references are left out at the moment and will be added once the appropriate bindings have been settled upon. Acked-by: NMarc Zyngier <maz@kernel.org> Signed-off-by: NMark Kettenis <kettenis@openbsd.org> Signed-off-by: NMarc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210921183420.436-5-kettenis@openbsd.orgSigned-off-by: NHector Martin <marcan@marcan.st>
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由 Mark Kettenis 提交于
Add pinctrl nodes corresponding to the gpio,t8101 nodes in the Apple device tree for the Mac mini (M1, 2020). Clock references are left out at the moment and will be added once the appropriate bindings have been settled upon. Signed-off-by: NMark Kettenis <kettenis@openbsd.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NMarc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210520171310.772-3-mark.kettenis@xs4all.nlSigned-off-by: NHector Martin <marcan@marcan.st>
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- 26 10月, 2021 3 次提交
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由 Rob Herring 提交于
Add a 'reg' entry for register-bit-led nodes on the Arm Ltd platforms. The 'reg' entry is the LED control register address. With this, the node name can be updated to use a generic node name, 'led', and a unit-address. Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20211024232003.211484-1-linus.walleij@linaro.org' Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Chanho Park 提交于
It can be compatible with exynos850's chipid. The SoC has eight chipid registers that can be used for OTP. Cc: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: NChanho Park <chanho61.park@samsung.com> Link: https://lore.kernel.org/r/20211021012017.158919-3-chanho61.park@samsung.comSigned-off-by: NKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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由 Amit Pundir 提交于
This reverts commit 001ce978. This upstream commit broke AOSP (post Android 12 merge) build on RB5. The device either silently crashes into USB crash mode after android boot animation or we see a blank blue screen with following dpu errors in dmesg: [ T444] hw recovery is not complete for ctl:3 [ T444] [drm:dpu_encoder_phys_vid_prepare_for_kickoff:539] [dpu error]enc31 intf1 ctl 3 reset failure: -22 [ T444] [drm:dpu_encoder_phys_vid_wait_for_commit_done:513] [dpu error]vblank timeout [ T444] [drm:dpu_kms_wait_for_commit_done:454] [dpu error]wait for commit done returned -110 [ C7] [drm:dpu_encoder_frame_done_timeout:2127] [dpu error]enc31 frame done timeout [ T444] [drm:dpu_encoder_phys_vid_wait_for_commit_done:513] [dpu error]vblank timeout [ T444] [drm:dpu_kms_wait_for_commit_done:454] [dpu error]wait for commit done returned -110 Fixes: 001ce978 ("arm64: dts: qcom: sm8250: remove bus clock from the mdss node for sm8250 target") Signed-off-by: NAmit Pundir <amit.pundir@linaro.org> Signed-off-by: NDmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211014135410.4136412-1-dmitry.baryshkov@linaro.org
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- 25 10月, 2021 30 次提交
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由 Bjorn Andersson 提交于
I didn't notice that I already had applied this patch and while this builds fine one copy is enough. This reverts commit 22efef1c. Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
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由 Bhupesh Sharma 提交于
'iface_clk' clock is not used by the qcom, bam_dma driver, so remove the same from 'ipq6018' dts. This is a preparatory patch for subsequent patch in this series which converts the qcom_bam_dma device-tree binding into YAML format. Without this change, 'make dtbs_check' leads to the following error: $ arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: dma-controller@7984000: clock-names: ['iface_clk', 'bam_clk'] is too long Fix the same. Cc: Thara Gopinath <thara.gopinath@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: NBhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211013105541.68045-4-bhupesh.sharma@linaro.org
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由 Bhupesh Sharma 提交于
'qcom,config-pipe-trust-reg' property doesn't seem to be used by the qcom, bam_dma driver, so remove the same from 'ipq6018' dts. This is a preparatory patch for subsequent patch in this series which converts the qcom_bam_dma device-tree binding into YAML format. Without this change, 'make dtbs_check' leads to the following error: $ arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: dma-controller@704000: 'qcom,config-pipe-trust-reg' does not match any of the regexes: 'pinctrl-[0-9]+' Fix the same. Cc: Thara Gopinath <thara.gopinath@linaro.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: NBhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211013105541.68045-3-bhupesh.sharma@linaro.org
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由 Bjorn Andersson 提交于
Add CPU topology and define the idle states for the silver and gold cores as well as the cluster. Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: NRobert Foss <robert.foss@linaro.org> Link: https://lore.kernel.org/r/20210825221600.1498939-1-bjorn.andersson@linaro.org
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由 Stephan Gerhold 提交于
For some reason apq8016-sbc, apq8096-db820c, msm8916-mtp and msm8996-mtp were added as separate .dts and .dtsi files where the first only contains the model name and the latter contains most of the actual definitions. Perhaps this was done with the expectation that there would be other devices also making use of exactly the same. However, this has not been the case until now and it also seems unlikely in the future. Having the extra .dtsi only clutters the file list and provides little benefit. Move the contents of the .dtsi into the .dts file to make this consistent with most other devices that simply define everything in the .dts. There are no functional changes introduced by this patch: The compiled ".dtb"s are completely identical. Signed-off-by: NStephan Gerhold <stephan@gerhold.net> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018133656.32649-1-stephan@gerhold.net
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由 Stephan Gerhold 提交于
SMEM can now be described directly in the reserved-memory. This is mainly meant for newer SoCs where there is only one SMEM region. However, even on older SoCs like MSM8916 there is clearly one main SMEM region (described by "memory-region") that holds the smem_header and one special extra region used only for data of the RPM ("qcom,rpm-msg-ram"). The definition in reserved-memory also looks cleaner for older SoCs, so make use of that in MSM8916 as well. Signed-off-by: NStephan Gerhold <stephan@gerhold.net> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018110009.30837-2-stephan@gerhold.net
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由 Stephan Gerhold 提交于
According to the new DT schema for qcom,rpm-msg-ram the node name should be sram@. memory@ is reserved for definition of physical RAM (usable by Linux). This fixes the following dtbs_check error on various device trees: memory@60000: 'device_type' is a required property From schema: dtschema/schemas/memory.yaml Signed-off-by: NStephan Gerhold <stephan@gerhold.net> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211018110009.30837-1-stephan@gerhold.net
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由 J.R. Divya Antony 提交于
This device has MPU-6515 imu and Asahi Kasei AK09911 magnetometer, Add support for it. Signed-off-by: NJ.R. Divya Antony <d.antony.jr@gmail.com> Reviewed-by: NStephan Gerhold <stephan@gerhold.net> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211012112735.2765-3-d.antony.jr@gmail.com
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由 J.R. Divya Antony 提交于
Enable SDHCI (SD Card) Storage. Signed-off-by: NJ.R. Divya Antony <d.antony.jr@gmail.com> Reviewed-by: NStephan Gerhold <stephan@gerhold.net> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211012112735.2765-2-d.antony.jr@gmail.com
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由 J.R. Divya Antony 提交于
Add support for touchscreen in this device. Signed-off-by: NJ.R. Divya Antony <d.antony.jr@gmail.com> Reviewed-by: NStephan Gerhold <stephan@gerhold.net> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211012112735.2765-1-d.antony.jr@gmail.com
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由 David Heidelberg 提交于
This property doesn't exist in Linux kernel. Fixes: 288ef8a4 ("arm64: dts: sdm845: add oneplus6/6t devices") Reviewed-by: NCaleb Connolly <caleb@connolly.tech> Signed-off-by: NDavid Heidelberg <david@ixit.cz> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211011200138.115688-1-david@ixit.cz
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由 Vladimir Zapolskiy 提交于
The change corrects the described bus clock of the QCE. Fixes: 3e482859 ("dts: qcom: sdm845: Add dt entries to support crypto engine.") Signed-off-by: NVladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: NThara Gopinath <thara.gopinath@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211011095534.1580406-1-vladimir.zapolskiy@linaro.org
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由 Vladimir Zapolskiy 提交于
The change adds description of Qualcomm crypto engine controller and BAM associated with it. The change is inspired by commit 3e482859 ("dts: qcom: sdm845: Add dt entries to support crypto engine.") While performance of cryptographic algorithms executed on QCE is lower than e.g. ones tinkered for ARM NEON, the offloaded execution would make sense: # cryptsetup benchmark | grep aes aes-cbc 128b 71.0 MiB/s 71.9 MiB/s aes-cbc 256b 62.4 MiB/s 62.4 MiB/s aes-xts 256b 70.7 MiB/s 70.8 MiB/s aes-xts 512b 62.0 MiB/s 63.3 MiB/s Signed-off-by: NVladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Cc: Thara Gopinath <thara.gopinath@linaro.org> Acked-by: NThara Gopinath <thara.gopinath@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211011094822.1580122-1-vladimir.zapolskiy@linaro.org
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由 Krzysztof Kozlowski 提交于
Although the early NXP NCI NFC bindings required the clock-frequency property, it was never used by the driver and it is actually a property of I2C bus, not I2C slave. Signed-off-by: NKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211011073143.32645-1-krzysztof.kozlowski@canonical.com
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由 J.R. Divya Antony 提交于
This device has MPU-6515 imu and Asahi Kasei AK09911 magnetometer. Add support for it. Signed-off-by: NJ.R. Divya Antony <d.antony.jr@gmail.com> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211010033750.15204-1-d.antony.jr@gmail.com
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Add support for the Venus video decoder/encoder but leave it disabled by default; it is expected to eventually get enabled in each machine specific DT, where required. Signed-off-by: NAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211008102119.268869-3-angelogioacchino.delregno@collabora.com
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由 Marijn Suijten 提交于
This string- and electrical configuration depend on the board and panel, and should hence not be defined generically for every user of pm660l. SoMainline will pick this configuration again when enabling WLED on the Sony Nile platform. Fixes: 7b56a804 ("arm64: dts: qcom: pm660l: Add WLED support") Signed-off-by: NMarijn Suijten <marijn.suijten@somainline.org> Reviewed-By: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007213400.258371-14-marijn.suijten@somainline.org
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由 Marijn Suijten 提交于
The number of WLED strings used by a certain platform depend on the panel connected to that board and may not be the same for every user of pmi8994. Signed-off-by: NMarijn Suijten <marijn.suijten@somainline.org> Reviewed-By: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007213400.258371-13-marijn.suijten@somainline.org
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由 Marijn Suijten 提交于
The driver now sets an appropriate default for WLED4 (and WLED5) just like WLED3 making this linear array from 0-3 redundant. In addition the driver is now able to parse arrays of variable length solving the "all four strings *have to* be defined" comment. Besides the driver will now warn when both properties are specified to prevent ambiguity: the length of the array is enough to imply a set number of strings. Signed-off-by: NMarijn Suijten <marijn.suijten@somainline.org> Reviewed-By: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007213400.258371-12-marijn.suijten@somainline.org
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由 Marijn Suijten 提交于
The property is named "qcom,external-pfet", as found by dt_binding_check: 'qcom,eternal-pfet' does not match any of the regexes Fixes: 37aa540c ("arm64: dts: qcom: pmi8994: Add WLED node") Signed-off-by: NMarijn Suijten <marijn.suijten@somainline.org> Reviewed-By: NAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007213400.258371-11-marijn.suijten@somainline.org
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由 Matthias Kaehlcke 提交于
Herobrine is a Chrome OS board/platform based on the QCA SC7280. Add a .dtsi for the platform parts and a .dts for the board specific bits. Currently the .dtsi has everything except the compatible strings, things will likely get shuffled around in the future as we learn more about the differences between boards. Signed-off-by: NMatthias Kaehlcke <mka@chromium.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211007140854.1.I70615769f27bbaf7e480419d0f660f802b1fea43@changeid
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由 Prasad Malisetty 提交于
Enable PCIe controller and PHY for sc7280 IDP board. Add specific NVMe GPIO entries for SKU1 and SKU2 support. Signed-off-by: NPrasad Malisetty <pmaliset@codeaurora.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1633628923-25047-4-git-send-email-pmaliset@codeaurora.org
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由 Prasad Malisetty 提交于
Add PCIe controller and PHY nodes for sc7280 SOC. Signed-off-by: NPrasad Malisetty <pmaliset@codeaurora.org> Reviewed-by: NStephen Boyd <swboyd@chromium.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1633628923-25047-3-git-send-email-pmaliset@codeaurora.org
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由 Raffaele Tranquillini 提交于
This enables the JDI FHD_R63452 LCD panel used on Xiaomi Mi 5 Signed-off-by: NRaffaele Tranquillini <raffaele.tranquillini@gmail.com> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210925113808.524749-1-raffaele.tranquillini@gmail.com
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由 Rob Herring 提交于
The 'interrupt-map' in several QCom SoCs is malformed. The '#address-cells' size of the parent interrupt controller (the GIC) is not accounted for. Cc: Andy Gross <agross@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210928192210.1842377-1-robh@kernel.org
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由 Shawn Guo 提交于
Per QMP PHY bindings schema, 'vdda-phy-supply' and 'vdda-phy-supply' are required for IPQ8074 QMP USB3 PHY. Since supplies are not added in DTS for this platform, add a dummy regulator as the supply to QMP USB3 PHY, so that dtbs_check stops complaining the missing supplies. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-10-shawn.guo@linaro.org
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由 Shawn Guo 提交于
IPQ8074 PCIe PHY nodes are broken in the many ways: - '#address-cells', '#size-cells' and 'ranges' are missing. - Child phy/lane node is missing, and the child properties like '#phy-cells' and 'clocks' are mistakenly put into parent node. - The clocks properties for parent node are missing. Fix them to get the nodes comply with the bindings schema. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-9-shawn.guo@linaro.org
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由 Shawn Guo 提交于
'vdda-phy-supply' and 'vdda-pll-supply' are required properties. Add them to fix the dtbs_check warnings below. phy@1da7000: 'vdda-phy-supply' is a required property arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml phy@1da7000: 'vdda-pll-supply' is a required property arch/arm64/boot/dts/qcom/msm8998-asus-novago-tp370ql.dt.yaml arch/arm64/boot/dts/qcom/msm8998-hp-envy-x2.dt.yaml arch/arm64/boot/dts/qcom/msm8998-lenovo-miix-630.dt.yaml Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-8-shawn.guo@linaro.org
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由 Shawn Guo 提交于
The 'reg-names' is not a supported/used property. Drop it from QMP PHY nodes to fix dtbs_check warnings like below. phy-wrapper@88e9000: 'reg-names' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+' arch/arm64/boot/dts/qcom/sm8350-hdk.dt.yaml arch/arm64/boot/dts/qcom/sm8350-mtp.dt.yaml Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-7-shawn.guo@linaro.org
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由 Shawn Guo 提交于
The following properties are not supported and causing dtbs_check warnings. - vdda-phy-max-microamp - vdda-pll-max-microamp - vddp-ref-clk-max-microamp - vddp-ref-clk-always-on Drop them from QMP PHY nodes. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210929034253.24570-6-shawn.guo@linaro.org
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