- 24 2月, 2010 2 次提交
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由 Santosh Shilimkar 提交于
The commit 'ba50ea7e' reserves DMA channels 0 and 1 on high security devices, in order to avoid collision between kernel dma transfers and ROM code dma transfers. This fix is applicable only for OMAP3 so add an appropriate check. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> CC: Kalle Jokiniemi <kalle.jokiniemi@digia.com> CC: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: NKevin Hilman <khilman@deeprootsystems.com> Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Santosh Shilimkar 提交于
This patch enables smart-idle idlemodes and autoidle for sDMA on OMAP4 Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: NKevin Hilman <khilman@deeprootsystems.com> Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 2月, 2010 1 次提交
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由 Tony Lindgren 提交于
omap: Replace orred CONFIG_ARCH_OMAP2/3/4 with CONFIG_ARCH_OMAP2PLUS Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 1月, 2010 1 次提交
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由 Roel Kluin 提交于
The same flag and bits were tested twice. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 12月, 2009 1 次提交
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由 Janusz Krzysztofik 提交于
All of the LCD DMA code in plat-omap/dma.c appears to be OMAP1-only (and apparently only is available on a subset of OMAP1 chips). Move this code to mach-omap1/lcd_dma.c. Tested on OMAP1510 Amstrad Delta. Compile-tested with omap_generic_2420_defconfig. Reported-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Reviewed-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 12月, 2009 1 次提交
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由 André Goddard Rosa 提交于
That is "success", "unknown", "through", "performance", "[re|un]mapping" , "access", "default", "reasonable", "[con]currently", "temperature" , "channel", "[un]used", "application", "example","hierarchy", "therefore" , "[over|under]flow", "contiguous", "threshold", "enough" and others. Signed-off-by: NAndré Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 12 11月, 2009 4 次提交
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由 Aaro Koskinen 提交于
Clear DMA channel states so that users can assume a known initial state. Signed-off-by: NAaro Koskinen <aaro.koskinen@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kalle Jokiniemi 提交于
The secure sram context save uses dma channels 0 and 1. In order to avoid collision between kernel DMA transfers and ROM code dma transfers, we need to reserve DMA channels 0 1 on high security devices. A bug in ROM code leaves dma irq status bits uncleared. Hence those irq status bits need to be cleared when restoring DMA context after off mode. There was also a faulty parameter given to PPA in the secure ram context save assembly code, which caused interrupts to be enabled during secure ram context save. This caused the save to fail sometimes, which resulted the saved context to be corrupted, but also left DMA channels in secure mode. The secure mode DMA channels caused "DMA secure error with device 0" errors to be displayed. Signed-off-by: NKalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: NJouni Hogander <jouni.hogander@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Tero Kristo 提交于
For HS/EMU devices, these additional features are also used: - DMA interrupt disable routine added - Added DMA controller reset to DMA context restore Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Janusz Krzysztofik 提交于
With CONFIG_PM=y, the omapfb/lcdc device on Amstrad Delta, after initially starting correctly, breaks with the following error messages: omapfb omapfb: resetting (status 0xffffff96,reset count 1) ... omapfb omapfb: resetting (status 0xffffff96,reset count 100) omapfb omapfb: too many reset attempts, giving up. Looking closer at this I have found that it had been broken almost 2 years ago with commit 2418996e3b100114edb2ae110d5d4acb928909d2, PM fixes for OMAP1. The definite reason for broken omapfb/lcdc behavoiur in PM mode appeared to be ARM_IDLECT1:IDLIF_ARM (bit 6) put into idle regardless of LCD DMA possibly running. The bit were set based on return value of the omap_dma_running() function that did not check for dedicated LCD DMA channel status. The patch below fixes this. Note that the hardcoded register value will be fixed during the next merge cycle to use OMAP_LCDC_ defines. Currently the OMAP_LCDC_ defines are local to drivers/video/omap/lcdc.c, so let's not start moving those right now. Created against linux-2.6.32-rc6 Tested on Amstrad Delta Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 11 11月, 2009 1 次提交
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由 Tao Hu 提交于
The bug could cause irq enable bit of one DMA channel is cleared/set unexpectedly when 2 (or more) drivers are calling omap_request_dma()/omap_free_dma() simultaneously Signed-off-by: NFei Yang <AFY095@motorola.com> Signed-off-by: NTao Hu <taohu@motorola.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 10月, 2009 1 次提交
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由 Santosh Shilimkar 提交于
OMAP sDMA driver API omap_stop_dma() doesn't really stop the dma when used in linking scenario. The DMA channel needs to be disabled before resetting the chain. Also fix clearing of the OMAP_DMA_ACTIVE status in the linked case. Cc: Hari n <hari.zoom@gmail.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NVenkatraman S <svenkatr@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 21 10月, 2009 1 次提交
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由 Tony Lindgren 提交于
Move the remaining headers under plat-omap/include/mach to plat-omap/include/plat. Also search and replace the files using these headers to include using the right path. This was done with: #!/bin/bash mach_dir_old="arch/arm/plat-omap/include/mach" plat_dir_new="arch/arm/plat-omap/include/plat" headers=$(cd $mach_dir_old && ls *.h) omap_dirs="arch/arm/*omap*/ \ drivers/video/omap \ sound/soc/omap" other_files="drivers/leds/leds-ams-delta.c \ drivers/mfd/menelaus.c \ drivers/mfd/twl4030-core.c \ drivers/mtd/nand/ams-delta.c" for header in $headers; do old="#include <mach\/$header" new="#include <plat\/$header" for dir in $omap_dirs; do find $dir -type f -name \*.[chS] | \ xargs sed -i "s/$old/$new/" done find drivers/ -type f -name \*omap*.[chS] | \ xargs sed -i "s/$old/$new/" for file in $other_files; do sed -i "s/$old/$new/" $file done done for header in $(ls $mach_dir_old/*.h); do git mv $header $plat_dir_new/ done Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 10月, 2009 1 次提交
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由 Tony Lindgren 提交于
Use ioremap in dma.c Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 10月, 2009 1 次提交
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由 Anuj Aggarwal 提交于
Argument tparams was not being used to program global register GCR.HI_THREAD_RESERVED. This patch fixes the same. Signed-off-by: NAnuj Aggarwal <anuj.aggarwal@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 29 8月, 2009 1 次提交
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由 Tony Lindgren 提交于
Search and replace OMAP_IO_ADDRESS with OMAP1_IO_ADDRESS and OMAP2_IO_ADDRESS, and convert omap_read/write into a functions instead of a macros. Also rename OMAP_MPUIO_VBASE to OMAP1_MPUIO_VBASE. In the long run, most code should use ioremap + __raw_read/write instead. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 25 8月, 2009 1 次提交
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由 Janusz Krzysztofik 提交于
Implement DMA channel self linking on OMAP1510 using AUTO_INIT and REPEAT flags of the DMA CCR register. Created against linux-2.6.31-rc5. Tested on Amstrad Delta. Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 10 8月, 2009 1 次提交
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由 Vikram Pandita 提交于
This errata is valid for: OMAP2420 Errata 1.85 Impacts all 2420 ES rev OMAP2430 Errata 1.10 Impacts only ES1.0 Description: DMA may hang when several channels are used in parallel OMAP3430: Not impacted, so remove the errata fix for omap3 Fixed issue reported on cpu_is_omap24xx check reported by Nishant Kamat Signed-off-by: NVikram Pandita <vikram.pandita@ti.com> Reviewed-by: NNishant Kamat <nskamat@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 6月, 2009 1 次提交
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由 Kalle Jokiniemi 提交于
This patch enables MStandby smart-idle mode, autoidle smartidle mode, and the autoidle bit for DMA4_OCP_SYSCONFIG. Signed-off-by: NKalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKevin Hilman <khilman@ti.deeprootsystems.com>
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- 29 5月, 2009 3 次提交
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由 Santosh Shilimkar 提交于
This patch adds the support for OMAP4. The platform and machine specific headers and sources updated for OMAP4430 SDP platform. OMAP4430 is Texas Instrument's SOC based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Santosh Shilimkar 提交于
Original OMAP DMA chaining design had chain_id as one of the callback parameters. Patch 538528de changed it to use logical channel instead. Correct the naming for callback to also use logical channel number instead of the chain_id. More details are on this email thread: http://marc.info/?l=linux-omap&m=122961071931459&w=2Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tomi Valkeinen 提交于
Implement transparent copy and constant fill features for OMAP2/3. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 4月, 2009 1 次提交
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由 Santosh Shilimkar 提交于
Fix the possible race condition in omap_free_dma(). Function omap_free_dma() sets the dev_id = -1 and then accesses the channel afterwards to clear it. But setting the dev_id=-1 makes the channel available for allocation again. So it is possible someone else can grab it and results are unpredictable. To avod this DMA channle is cleared first and then the dev_id = -1 is set. Thanks to McNeil, Sean <sean.mcneil@ti.com> for ointing out this issue. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 3月, 2009 3 次提交
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由 Santosh Shilimkar 提交于
This fixes the spurious interrupt issue on a DMA channel. In OMAP sDMA, contrast to the SDMA.DMA4_CSRi registers, the SDMA.DMA4_IRQSTATUS_Lj registers are updated regardless of the corresponding bits in the SDMA.DMA4_IRQENABLE_Lj registers. Since there are four sDMA interrupt lines and if more than one line is actively used by two concurrently running sDMA softwares modules,then the spurious interrupt can be observed on the other lines. Fix in this patch will only dispatch the relevant and enabled interrupts on a particular line thus perevting spurious IRQ. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NNishant Kamat <nskamat@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Santosh Shilimkar 提交于
This patch set up a cmdline option for omap dma for masking the available channels. It is needed since the OMAP DMA is a system wide resource and can be used by another software apart from the kernel. To reserve the omap SDMA channels for kernel dma usage, use cmdline bootarg "omap_dma_reserve_ch=". The valid range is 1 to 32. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NNishant Kamat <nskamat@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Zebediah C. McClure 提交于
Changes to memory subsystem. Signed-off-by: NZebediah C. McClure <zmc@lurian.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 30 1月, 2009 2 次提交
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由 Jarkko Nikula 提交于
This has similar symptoms than 66c23551 where just omap_request_dma, omap_dma_link_lch and omap_dma_unlink_lch can cause incorrect dump_stack(). Here it can happen if channel has been used before and the channel flags variable holds old status. Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Juha Yrjola 提交于
CSR must be cleared before invoking the callback. If the callback function starts a new, fast DMA transfer on the same channel, the completion status might lost if CSR is cleared after the callback invocation. Signed-off-by: NJuha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 1月, 2009 1 次提交
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由 Anand Gadiyar 提交于
Bug in existing code causes synchro control to be set +32 if request line greater than 63 is used. Also clean up the function a bit by removing extra parens and clearing the bits at before write. Reported by Wenbiao Wang. Signed-off-by: NAnand Gadiyar <gadiyar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 11 12月, 2008 1 次提交
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由 Santosh Shilimkar 提交于
SDMA channel is not disabled after transaction error. So explicitly disable it. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked By : Nishant kamat <nskamat@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 30 11月, 2008 1 次提交
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由 Russell King 提交于
When ISA_DMA_API is unset, we're not implementing the ISA DMA API, so there's no point in publishing the prototypes via asm/dma.h, nor including the machine dependent parts of that API. This allows us to remove a lot of mach/dma.h files which don't contain any useful code. Unfortunately though, some platforms put their own private non-ISA definitions into mach/dma.h, so we leave these behind and fix the appropriate #include statments. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 9月, 2008 2 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
OMAP1_IO_ADDRESS(), OMAP2_IO_ADDRESS() and IO_ADDRESS() returns cookies for use with __raw_{read|write}* for accessing registers. Therefore, these macros should return (void __iomem *) cookies, not integer values. Doing this improves typechecking, and means we can find those places where, eg, DMA controllers are incorrectly given virtual addresses to DMA to, or physical addresses are thrown through a virtual to physical address translation. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 8月, 2008 2 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 7月, 2008 3 次提交
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由 Tony Lindgren 提交于
DMA clean-up, mostly checkpatch.pl fixes. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Remove __REG access in DMA code, use dma_read/write instead: - dynamically set the omap_dma_base based on the omap type - omap_read/write becomes dma_read/write - dma channel registers are read with dma_ch_read/write Cc: David Brownell <david-b@pacbell.net> Cc: linux-usb@vger.kernel.org Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Make DMA channels dynamic for multi-boot Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 06 6月, 2008 1 次提交
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由 Jarkko Nikula 提交于
Channel should be marked active only when DMA is really started. Otherwise just omap_request_dma, omap_dma_link_lch and omap_dma_unlink_lch will cause incorrect dump_stack(). Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 10 5月, 2008 1 次提交
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由 Jarkko Nikula 提交于
Function enable_lnk does incorrect channel link on non-omap1 builds if chain is created manually with omap_request_dma and omap_dma_link_lch functions. Fix this by making sure that next_linked_ch field is initialized to -1 just in omap_request_dma. Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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