- 06 1月, 2010 4 次提交
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由 Rusty Russell 提交于
This reverts commit ae1b22f6. As Linus said in 982d007a: "There was something really messy about cmpxchg8b and clone CPU's, so if you enable it on other CPUs later, do it carefully." This breaks lguest for those configs, but we can fix that by emulating if we have to. Fixes: http://bugzilla.kernel.org/show_bug.cgi?id=14884Signed-off-by: NRusty Russell <rusty@rustcorp.com.au> Cc: stable@kernel.org Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Li Jie 提交于
Implement arch_reset(), reboot from shell become possible. Signed-off-by: Nlijie <eltshanli@gmail.com> Acked-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Li Jie 提交于
This patch fix following bugs: 1. typo error, CLOCK_EVT_MODE_PERIODIC -> CLOCK_EVT_FEAT_PERIODIC 2. TCSR register of timer1 missed PRESCALE 3. timer1 should be enabled before register it to clock source. Signed-off-by: Nlijie <eltshanli@gmail.com> Acked-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Bahadir Balban 提交于
Signed-off-by: NBahadir Balban <bbalban@b-labs.co.uk> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 1月, 2010 2 次提交
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由 David S. Miller 提交于
For chips like Niagara2 that have true overflow indications in the %pcr (which we don't actually need and don't use) the interrupt signal persists until the overflow bits are cleared by an explicit %pcr write. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 David S. Miller 提交于
If perf events are active, we should not reset the %pcr to PCR_PIC_PRIV. That perf events code does the management. Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 1月, 2010 13 次提交
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由 Uwe Kleine-König 提交于
otg_ulpi_create is defined in drivers/usb/otg/ulpi.c which depends on CONFIG_USB_ULPI. So protect its usage by the same symbol. Moreover mxc_ulpi_access_ops needs CONFIG_MXC_ULPI. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Valentin Longchamp <valentin.longchamp@epfl.ch> Cc: Daniel Mack <daniel@caiaq.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Wolfgang Denk 提交于
Commit 52939c03 (ARM: MX3: fix CPU revision number detection) started using the CPU's SREV register for revision number detection. This makes it mandatory to have a valid SPBA0 mapping. Add this to the global map_io code instead of adding multiple copies for each board. Signed-off-by: NWolfgang Denk <wd@denx.de> Cc: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Tested on Qong (EVB-Lite) Tested-by: NWolfgang Denk <wd@denx.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Baruch Siach 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Baruch Siach 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Baruch Siach 提交于
NO_PAD_CTL is not defined anywhere. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Valentin Longchamp 提交于
Signed-off-by: NValentin Longchamp <valentin.longchamp@epfl.ch> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Guennadi Liakhovetski 提交于
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Alan Carvalho de Assis 提交于
Signed-off-by: NAlan Carvalho de Assis <acassis@gmail.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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由 Martin Schwidefsky 提交于
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Robert P. J. Day 提交于
Since the files have identical content, might as well simplify. Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This has the adverse effect of converting many 29bit configs to 32bit mode, while this is a change that needs to be done manually for each platform. Turn it off by default in order to cut down on spurious bug reports. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
While the PMB is available on SH-4A parts, SH4AL-DSP parts exclude it altogether. As such, explicitly disable PMB support for these parts. If this changes in the future for newer subtypes, this will have to be made more fine-grained. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 31 12月, 2009 3 次提交
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由 Frederic Weisbecker 提交于
Pass the frame pointer from the regs of the interrupted path to dump_trace() while processing the stack trace. Currently, dump_trace() takes the current bp and starts the callchain from dump_trace() itself. This is wasteful because we need to walk through the entire NMI/DEBUG stack before retrieving the interrupted point. We can fix that by just using the frame pointer from the captured regs. It points exactly where we want to start. Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Paul Mackerras <paulus@samba.org> LKML-Reference: <1262235183-5320-1-git-send-regression-fweisbec@gmail.com> Signed-off-by: NIngo Molnar <mingo@elte.hu> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Paul Mackerras <paulus@samba.org>
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由 Zhang Rui 提交于
Introduce kernel parameter acpi_sleep=sci_force_enable some laptop requires SCI_EN being set directly on resume, or else they hung somewhere in the resume code path. We already have a blacklist for these laptops but we still need this option, especially when debugging some suspend/resume problems, in case there are systems that need this workaround and are not yet in the blacklist. Signed-off-by: NZhang Rui <rui.zhang@intel.com> Acked-by: NRafael J. Wysocki <rjw@sisk.pl> Signed-off-by: NLen Brown <len.brown@intel.com>
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由 Mike Travis 提交于
The wrong address was being used to write the SCIR led regs on remote hubs. Also, there was an inconsistency between how BIOS and the kernel indexed these regs. Standardize on using the lower 6 bits of the APIC ID as the index. This patch fixes the problem of writing to an errant address to a cpu # >= 64. Signed-off-by: NMike Travis <travis@sgi.com> Reviewed-by: NJack Steiner <steiner@sgi.com> Cc: stable@kernel.org Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 29 12月, 2009 11 次提交
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由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Haojian Zhuang 提交于
PXA mmc host driver supports card detect, read only and power gpio pin setting already. Zylonite platform driver needn't implement this any more. Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Uwe Kleine-König 提交于
ARRAY_AND_SIZE is already defined arch/arm/mach-mmp/common.h which is already included. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Bin Yang <bin.yang@marvell.com> Acked-by: NHaojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <maz@misterjones.org> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Marc Zyngier 提交于
DM9000s on Zeus sometime fail under heavy load. Relaxing the timings a bit seems to be of a great help. Signed-off-by: NMarc Zyngier <maz@misterjones.org> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Marc Zyngier 提交于
Signed-off-by: NMarc Zyngier <maz@misterjones.org> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Marek Vasut 提交于
This has to be selected, otherwise some peripherals don't get initialized. Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marek.vasut@gmail.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 H Hartley Sweeten 提交于
Use resource_size for {request/release}_mem_region and ioremap. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NEric Miao <eric.y.miao@gmail.com>
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由 Mike Travis 提交于
The wrong address was being used to write the SCIR led regs on remote hubs. Also, there was an inconsistency between how BIOS and the kernel indexed these regs. Standardize on using the lower 6 bits of the APIC ID as the index. This patch fixes the problem of writing to an errant address to a cpu # >= 64. Signed-off-by: NMike Travis <travis@sgi.com> Reviewed-by: NJack Steiner <steiner@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: stable@kernel.org LKML-Reference: <4B3922F9.3060905@sgi.com> [ v2: fix a number of annoying checkpatch artifacts and whitespace noise ] Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Paul Mundt 提交于
As CPUs are migrated over to more fully-featured clock frameworks of their own and off of the legacy CPG code, they no longer have any real need for defining the PCLK value. The PCLK define in itself is already fairly misleading, as many boards get their input clocks from different sources, making this value fairly arbitrary anyways. Outside of the legacy CPG clock framework, the only place where this value is used is for deriving CLOCK_TICK_RATE, which we set back to the legacy PIT value that it was before the PCLK definitions were added in the first place. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 28 12月, 2009 2 次提交
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由 Pekka Enberg 提交于
As suggested by Vegard Nossum, use KERN_WARNING for error reporting to make sure kmemcheck reports end up in syslog. Suggested-by: NVegard Nossum <vegard.nossum@gmail.com> Signed-off-by: NPekka Enberg <penberg@cs.helsinki.fi> Cc: Andrew Morton <akpm@linux-foundation.org> LKML-Reference: <1261990935.4641.7.camel@penberg-laptop> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Pekka Enberg 提交于
Andrew Morton reported a strange looking kmemcheck warning: WARNING: kmemcheck: Caught 32-bit read from uninitialized memory (ffff88004fba6c20) 0000000000000000310000000000000000000000000000002413000000c9ffff u u u u u u u u u u u u u u u u i i i i i i i i u u u u u u u u [<ffffffff810af3aa>] kmemleak_scan+0x25a/0x540 [<ffffffff810afbcb>] kmemleak_scan_thread+0x5b/0xe0 [<ffffffff8104d0fe>] kthread+0x9e/0xb0 [<ffffffff81003074>] kernel_thread_helper+0x4/0x10 [<ffffffffffffffff>] 0xffffffffffffffff The above printout is missing register dump completely. The problem here is that the output comes from syslog which doesn't show KERN_INFO log-level messages. We didn't see this before because both of us were testing on 32-bit kernels which use the _default_ log-level. Fix that up by explicitly using KERN_DEFAULT log-level for __show_regs() printks. Signed-off-by: NPekka Enberg <penberg@cs.helsinki.fi> Cc: Vegard Nossum <vegard.nossum@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> LKML-Reference: <1261988819.4641.2.camel@penberg-laptop> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 27 12月, 2009 5 次提交
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由 Alexander Graf 提交于
We were shifting the Ks/Kp/N bits one bit too far on mtsrin. It took me some time to figure that out, so I also put in some debugging and a comment explaining the conversion. This fixes current OpenBIOS boot on PPC64 KVM. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Luck, Tony 提交于
Len Brown pointed out that allmodconfig is broken for ia64 because of: arch/ia64/kvm/vmm.c: In function 'vmm_spin_unlock': arch/ia64/kvm/vmm.c:70: error: 'spinlock_t' has no member named 'raw_lock' KVM has it's own spinlock routines. It should not depend on the base kernel spinlock_t type (which changed when ia64 switched to ticket locks). Define its own vmm_spinlock_t type. Signed-off-by: NTony Luck <tony.luck@intel.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Jan Kiszka 提交于
User space may not want to overwrite asynchronously changing VCPU event states on write-back. So allow to skip nmi.pending and sipi_vector by setting corresponding bits in the flags field of kvm_vcpu_events. [avi: advertise the bits in KVM_GET_VCPU_EVENTS] Signed-off-by: NJan Kiszka <jan.kiszka@siemens.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Marcelo Tosatti 提交于
The vcpus are initialized with irr_pending set to false, but loading the LAPIC registers with pending IRR fails to reset the irr_pending variable. Cc: stable@kernel.org Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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由 Marcelo Tosatti 提交于
The invlpg prefault optimization breaks Windows 2008 R2 occasionally. The visible effect is that the invlpg handler instantiates a pte which is, microseconds later, written with a different gfn by another vcpu. The OS could have other mechanisms to prevent a present translation from being used, which the hypervisor is unaware of. While the documentation states that the cpu is at liberty to prefetch tlb entries, it looks like this is not heeded, so remove tlb prefetch from invlpg. Cc: stable@kernel.org Signed-off-by: NMarcelo Tosatti <mtosatti@redhat.com> Signed-off-by: NAvi Kivity <avi@redhat.com>
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