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  1. 29 11月, 2011 3 次提交
    • N
      ath5k: Cleanups v1 · 34ce644a
      由 Nick Kossifidis 提交于 
      No functional changes, just a few comments/documentation/cleanup
Signed-off-by: NNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      34ce644a
    • N
      ath5k: Add TXNOFRM to INT_TX_ALL · fea94807
      由 Nick Kossifidis 提交于 
      Add TXNOFRM to INT_TX_ALL since it's a TX interrupt too.
Signed-off-by: NNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      fea94807
    • N
      ath5k: Switch from read-and-clear to write-to-clear method when handling PISR/SISR registers · 7ff7c82e
      由 Nick Kossifidis 提交于 
      Since card has 12 tx queues and we want to keep track of the interrupts
per queue we can't fit all these interrupt bits on a single register.
So we have 5 registers, the primary interrupt status register (PISR) and
the 4 secondary interupt status registers (SISRs).

In order to be able to read them all at once (atomic operation) Atheros
introduced the Read-And-Clear registers to make things easier. So when
reading RAC_PISR register, hw does a read on PISR and all SISRs, returns
the value of PISR, copies all SISR values to their shadow copies (RAC_SISRx)
and clears PISR and SISRs. This saves us from reading PISR/SISRs in a sequence.

So far we 've used this approach and MadWiFi/Windows driver etc also used it
for years.

It turns out this operation is not atomic after all (at least not on all cards)
That means it's possible to loose some interrupts because they came after the
copy step and hw cleared them on the clean step !

That's probably the reason we got missed beacons, got stuck queues etc and
couldn't figure out what was going on.

With this patch we switch from RaC operation to an alternative method (that
makes more sense IMHO anyway, I just chose to be on the safe side so far).
Instead of reading RAC registers, we read the normal PISR/SISR registers and
clear any bits we got by writing them back on the register. This will clear only
the bits we got on our read step and leave any new bits unaffected (at least
that's what docs say). So if any new interrupts come up we won't miss it.

I've tested this with an AR5213 and an AR2425 and it seems O.K.

Many thanks to Adrian Chadd for debuging this and reviewing the patch !

v2: Make sure we don't clear PISR bits that map to SISR generated interrupts
(added a comment on the code for this)
Signed-off-by: NNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      7ff7c82e
  3. 01 11月, 2011 5 次提交
  5. 12 10月, 2011 1 次提交
  7. 04 10月, 2011 1 次提交
    • E
      mac80211: pass vif param to conf_tx() callback · 8a3a3c85
      由 Eliad Peller 提交于 
      tx params should be configured per interface.
add ieee80211_vif param to the conf_tx callback,
and change all the drivers that use this callback.

The following spatch was used:
@rule1@
struct ieee80211_ops ops;
identifier conf_tx_op;
@@
	ops.conf_tx = conf_tx_op;

@rule2@
identifier rule1.conf_tx_op;
identifier hw, queue, params;
@@
	conf_tx_op (
-		struct ieee80211_hw *hw,
+		struct ieee80211_hw *hw, struct ieee80211_vif *vif,
		u16 queue,
		const struct ieee80211_tx_queue_params *params) {...}
Signed-off-by: NEliad Peller <eliad@wizery.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      8a3a3c85
  9. 28 9月, 2011 1 次提交
  11. 10 8月, 2011 1 次提交
  13. 09 8月, 2011 6 次提交
  15. 22 7月, 2011 3 次提交
  17. 21 7月, 2011 1 次提交
    • P
      ath5k: merge ath5k_hw and ath5k_softc · e0d687bd
      由 Pavel Roskin 提交于 
      Both ath5k_hw and ath5k_softc represent one instance of the hardware.
This duplication is historical and is not needed anymore.

Keep the name "ath5k_hw" for the merged structure and "ah" for the
variable pointing to it.  "ath5k_hw" is shorter than "ath5k_softc", more
descriptive and more widely used.

Put the combined structure to ath5k.h where the old ath5k_softc used to
be. Move some code from base.h to ath5k.h as needed.

Remove memory allocation for struct ath5k_hw and the corresponding error
handling.  Merge iobase and ah_iobase fields.
Signed-off-by: NPavel Roskin <proski@gnu.org>
Acked-by: NNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
      e0d687bd
  19. 14 7月, 2011 8 次提交
  21. 12 7月, 2011 4 次提交
  23. 08 7月, 2011 6 次提交