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  1. 22 8月, 2020 1 次提交
  3. 04 8月, 2020 1 次提交
  5. 24 7月, 2020 1 次提交
    • V
      cxgb4: add loopback ethtool self-test · 7235ffae
      由 Vishal Kulkarni 提交于 
      In this test, loopback pkt is created and sent on default queue.
The packet goes until the Multi Port Switch (MPS) just before
the MAC and based on the specified channel number, it either
goes outside the wire on one of the physical ports or looped
back to Rx path by MPS. In this case, we're specifying loopback
channel, instead of physical ports, so the packet gets looped
back to Rx path, instead of getting transmitted on the wire.

v3:
- Modify commit message to include test details.
v2:
- Add only loopback self-test.
Signed-off-by: NVishal Kulkarni <vishal@chelsio.com>
Acked-by: NJakub Kicinski <kuba@kernel.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7235ffae
  7. 15 7月, 2020 1 次提交
  9. 01 7月, 2020 3 次提交
  11. 24 6月, 2020 1 次提交
  13. 20 6月, 2020 1 次提交
  15. 19 6月, 2020 4 次提交
  17. 02 6月, 2020 1 次提交
    • R
      cxgb4/chcr: Enable ktls settings at run time · a3ac249a
      由 Rohit Maheshwari 提交于 
      Current design enables ktls setting from start, which is not
efficient. Now the feature will be enabled when user demands
TLS offload on any interface.

v1->v2:
- taking ULD module refcount till any single connection exists.
- taking rtnl_lock() before clearing tls_devops.

v2->v3:
- cxgb4 is now registering to tlsdev_ops.
- module refcount inc/dec in chcr.
- refcount is only for connections.
- removed new code from cxgb_set_feature().

v3->v4:
- fixed warning message.
Signed-off-by: NRohit Maheshwari <rohitm@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a3ac249a
  19. 23 5月, 2020 1 次提交
  21. 16 5月, 2020 1 次提交
  23. 08 5月, 2020 1 次提交
  25. 09 3月, 2020 1 次提交
    • R
      cxgb4/chcr : Register to tls add and del callback · 34aba2c4
      由 Rohit Maheshwari 提交于 
      A new macro is defined to enable ktls tx offload support on Chelsio
T6 adapter. And if this macro is enabled, cxgb4 will send mailbox to
enable or disable ktls settings on HW.
In chcr, enabled tx offload flag in netdev and registered tls_dev_add
and tls_dev_del.

v1->v2:
- mark tcb state to close in tls_dev_del.
- u_ctx is now picked from adapter structure.
- clear atid in case of failure.
- corrected ULP_CRYPTO_KTLS_INLINE value.

v2->v3:
- add empty line after variable declaration.
- local variable declaration in reverse christmas tree ordering.
Signed-off-by: NRohit Maheshwari <rohitm@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      34aba2c4
  27. 04 3月, 2020 1 次提交
  29. 31 12月, 2019 1 次提交
  31. 11 12月, 2019 1 次提交
  33. 23 11月, 2019 3 次提交
  35. 21 11月, 2019 2 次提交
    • R
      cxgb4: check rule prio conflicts before offload · 41ec03e5
      由 Rahul Lakkireddy 提交于 
      Only offload rule if it satisfies both of the following conditions:
1. The immediate previous rule has priority <= current rule's priority.
2. The immediate next rule has priority >= current rule's priority.

Also rework free entry fetch logic to search from end of TCAM, instead
of beginning, because higher indices have lower priority than lower
indices. This is similar to how TC auto generates priority values.

v5:
- Fixed commit message and comment to include comparison for equal
  priority.

v4:
- Patch added in this version.
Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      41ec03e5
    • R
      cxgb4: add TC-MATCHALL classifier egress offload · 4ec4762d
      由 Rahul Lakkireddy 提交于 
      Add TC-MATCHALL classifier offload with TC-POLICE action applied for
all outgoing traffic on the underlying interface. Split flow block
offload to support both egress and ingress classification.

For example, to rate limit all outgoing traffic to 1 Gbps:

$ tc qdisc add dev enp2s0f4 clsact
$ tc filter add dev enp2s0f4 egress matchall skip_sw \
	action police rate 1Gbit burst 8Kbit

Note that skip_sw is important. Otherwise, both stack and hardware
will end up doing policing. Policing can't be shared across flow
blocks. Only 1 egress matchall rule can be active at a time on the
underlying interface.

v5:
- No change.

v4:
- Removed check to reject police offload if prio is not 1.
- Moved TC_SETUP_BLOCK code to separate function.

v3:
- Added check to reject police offload if prio is not 1.
- Assign block_shared variable only for TC_SETUP_BLOCK.

v2:
- Added check to reject flow block sharing for policers.
Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4ec4762d
  37. 08 11月, 2019 6 次提交
  39. 25 6月, 2019 4 次提交
  41. 10 6月, 2019 1 次提交
  43. 24 5月, 2019 1 次提交
  45. 23 5月, 2019 1 次提交
    • V
      cxgb4: Enable hash filter with offload · 74dd5aa1
      由 Vishal Kulkarni 提交于 
      Hash (exact-match) filters used for offloading flows share the
same active region resources on the chip with upper layer drivers,
like iw_cxgb4, chcr, etc. Currently, only either Hash filters
or ULDs can use the active region resources, but not both. Hence,
use the new firmware configuration parameters (when available)
to allow both the Hash filters and ULDs to share the
active region simultaneously.
Signed-off-by: NVishal Kulkarni <vishal@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      74dd5aa1
  47. 30 3月, 2019 1 次提交