- 10 4月, 2013 2 次提交
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由 Kumar Gala 提交于
Move to keeping the SoC registers that control and config the PCI controllers on FSL SoCs in the pci_controller struct. This allows us to not need to ioremap() the registers in multiple different places that use them. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Paul Bolle 提交于
The last users of Kconfig symbol MPC10X_OPENPIC were removed in v2.6.27. Its Kconfig entry can be removed now. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 09 4月, 2013 1 次提交
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由 Kumar Gala 提交于
* Fix cpu unit address to match reg * Update compatible for rcpm & clockgen to be 2.0 instead of 2 Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 04 4月, 2013 5 次提交
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由 Chen-Hui Zhao 提交于
mpic_reset_core() need a logical cpu number instead of physical. Signed-off-by: NZhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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lockdep thinks that it might deadlock because it grabs a lock of the same class while calling the generic_irq_handler(). This annotation will inform lockdep that it will not. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Shaveta Leekha 提交于
Signed-off-by: NVakul Garg <vakul@freescale.com> Signed-off-by: NShaveta Leekha <shaveta@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Roy Zang 提交于
The size might be 64 bit, so use ilog2() instead of __ilog2() or __ilog2_u64(). ilog2() can select 32bit or 64bit function automatically. Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Ben Collins 提交于
Somehow the driver snuck in with these still in it. Signed-off-by: NBen Collins <ben.c@servergy.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 19 3月, 2013 4 次提交
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由 Kumar Gala 提交于
As the T4240 is based on corenet chassis v2.0 spec we update the global utilities (GUTS) device config compatiable to reflect this. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Stephen George 提交于
Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: NStephen George <Stephen.George@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Stephen George 提交于
Signed-off-by: NStephen George <Stephen.George@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Prabhakar Kushwaha 提交于
Add CONFIG(s) required for NAND and NOR flash controller usage. It defines MTD, Jffs2 and UBIFS file system required for controllers. It also enables IFC controller Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 16 3月, 2013 3 次提交
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由 Kumar Gala 提交于
Commit 193ab2a6 changed the USB gadget Kconfig symbol from USB_GADGET_FSL_QE to USB_FSL_QE, but did not update the associated symbol name in qe_lib to match. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jia Hongtao 提交于
mpc85xx_pci_err_probe(struct platform_device *op) need platform_device declaration for definition. Otherwise, it will cause compile error if any files including fsl_pci.h without declaration of platform_device. Signed-off-by: NJia Hongtao <hongtao.jia@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Paul Bolle 提交于
The last user of Kconfig symbol 8260_PCI9 got removed in release v3.2. Remove this symbol too. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 15 3月, 2013 1 次提交
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由 Roy Zang 提交于
E1000 NIC is a common used Ethernet card. Enable it as default for mpc85xx platform. other change is due to make savedefconfig Reported-by: NFu Jiwei <b36666@freescale.com> Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 14 3月, 2013 1 次提交
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由 Stuart Yoder 提交于
Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 13 3月, 2013 9 次提交
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由 Scott Wood 提交于
This is a commonly used ethernet card, especially with mainline kernels which lack datapath support. Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Tang Yuantian 提交于
Config FSL_SOC does not depend on PPC_CLOCK anymore since the following commit got merged: 93abe8e4 (clk: add non CONFIG_HAVE_CLK routines) Config CPM does not use PPC_CLOCK either currently. So remove them. PPC_CLOCK also keeps Freescale PowerPC archtecture from supporting COMMON_CLK. Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Jiucheng Xu 提交于
Due to the partition of JFFS2 overlaps with QE ucode firmware, So JFFS2 will break QE ucode. Shrink JFFS2's partition to reserve the space of QE ucode firmware. Signed-off-by: NJiucheng Xu <Jiucheng.Xu@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Ramneek Mehresh 提交于
Add first usb controller node for qonverge qoriq platforms like B4860, etc Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
* Add support for up to 24 cores on T4240 (includes threads) * Enable AltiVec support (on T4240) * Add T4240QDS board into build * Other changes are due to general kernel update of defconfig Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Some minor changes to the common corenet_ds.c code are needed to support the T4240QDS: * Add support for "fsl,qoriq-pcie-v3.0" controller * Bump max # of IRQs to 512 (T4240 supports more interrupts than previous SoCs). Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NScott Wood <scottwood@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
Enable a baseline T4240 SoC to boot. There are several things missing from the device trees for T4240: * Proper PAMU topology information * DPAA related nodes (Qman, Bman, Fman, Rman, DCE) * Prefetch Manager * Thermal monitor unit * Interlaken Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NMinghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: NHaiying Wang <Haiying.Wang@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NPrabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: NYork Sun <yorksun@freescale.com> Signed-off-by: NVakul Garg <vakul@freescale.com> Signed-off-by: NTang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: NZhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: NLi Yang <leoli@freescale.com> Signed-off-by: NRamneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: NLaurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Kumar Gala 提交于
The e6500 core adds support for AltiVec on a Book-E class processor. Connect up all the various exception handling code and build config mechanisms to allow user spaces apps to utilize AltiVec. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 06 3月, 2013 5 次提交
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由 Kumar Gala 提交于
The e6500 core used on T4240 and B4860 SoCs from FSL implements MMUv2 of the Power Book-E Architecture. However there are some minor differences between it and other Book-E implementations. Add support to parse SPRN_TLB1PS for the variable page sizes supported. In the future this should be expanded for more page sizes supported on e6500 as well as other MMU features. This patch is based on code from Scott Wood. Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Roy ZANG 提交于
The T4240 utilizes a new PCIe controller block that has some minor programming model differences from previous versions. The major one that impacts initialization is how we determine the link state. On the 3.x controllers we have a memory mapped SoC register instead of a PCI config register that reports the link state. Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Vakul Garg 提交于
Add device tree for SEC (crypto engine) version 5.0 used on T4240. Signed-off-by: NVakul Garg <vakul@freescale.com> Signed-off-by: NAndy Fleming <afleming@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Stuart Yoder 提交于
Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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由 Stuart Yoder 提交于
-also define a binding for fsl,eref-* properties Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com> Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
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- 05 3月, 2013 9 次提交
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由 Michael Neuling 提交于
We support DSCR (Data Stream Control Register) so we should make sure we set it in the FSCR (Facility Status & Control Register) incase some firmwares don't set it. If we don't set this, we'll take a facility unavailable exception when using the DSCR. Signed-off-by: NMichael Neuling <mikey@neuling.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michael Neuling 提交于
This sets the DSCR (Data Stream Control Register) in the FSCR (Facility Status & Control Register). Also harmonise TAR (Target Address Register) FSCR bit definition too. Signed-off-by: NMichael Neuling <mikey@neuling.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michael Neuling 提交于
Currently we only set the FSCR (Facility Status and Control Register) when HV=1 but this feature is available when HV=0 also. This patch sets FSCR when HV=0. Also, we currently only set the FSCR on the master CPU. This patch also sets the FSCR on secondary CPUs. Signed-off-by: NMichael Neuling <mikey@neuling.org> cc: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Tony Breeds 提交于
Since kmp takes 2 unsigned long args there should be a compat wrapper. Since one isn't provided I think it's safer just to hook this up to not implemented. If we need it later we can do it properly then. Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Akinobu Mita 提交于
The BITOP_LE_SWIZZLE macro was used in the little-endian bitops functions for powerpc. But these functions were converted to generic bitops and the BITOP_LE_SWIZZLE is not used anymore. Signed-off-by: NAkinobu Mita <akinobu.mita@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Michael Neuling 提交于
Currently we use the link register to branch up high in the early MMU on syscall entry path. Unfortunately, this trashes the link stack as the address we are going to is not associated with the earlier mflr. This patch simply converts us to used the count register (volatile over syscalls anyway) instead. This is much better at predicting in this scenario and doesn't trash link stack causing a bunch of additional branch mispredicts later. Benchmarking this on POWER8 saves a bunch of cycles on Anton's null syscall benchmark here: http://ozlabs.org/~anton/junkcode/null_syscall.cSigned-off-by: NMichael Neuling <mikey@neuling.org> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Chen Gang 提交于
when strlen pi->location_code is larger than HVCS_CLC_LENGTH + 1, original implementation can not let hvcsd->p_location_code NUL terminated. so need fix it (also can simplify the code) Signed-off-by: NChen Gang <gang.chen@asianux.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Chen Gang 提交于
the dest buf len is 80 (HVCS_CLC_LENGTH + 1). the src buf len is PAGE_SIZE. if src buf string len is more than 80, it will cause issue. Signed-off-by: NChen Gang <gang.chen@asianux.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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由 Tony Breeds 提交于
When building with CRYPTO_SHA1_PPC enabled we fail with: powerpc/crypto/sha1-powerpc-asm.S: Assembler messages: powerpc/crypto/sha1-powerpc-asm.S:116: Error: can't resolve `0' {*ABS* section} - `STACKFRAMESIZE' {*UND* section} powerpc/crypto/sha1-powerpc-asm.S:116: Error: expression too complex powerpc/crypto/sha1-powerpc-asm.S:178: Error: unsupported relocation against STACKFRAMESIZE Use INT_FRAME_SIZE instead of STACKFRAMESIZE. Signed-off-by: NTony Breeds <tony@bakeyournoodle.com> Tested-by: NChristian Kujau <lists@nerdbynature.de> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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