[Why]
Allow for disabling non transparent mode of LTTPR for running tests.

[How]
Add a feature flag and set them during init sequence. The flags are
already being used in DC.
Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drm_display_info is updated by drm_get_edid() or
drm_connector_update_edid_property(). In the amdgpu driver it is almost
always updated when the edid is read in amdgpu_connector_get_edid(),
but not always.  Change amdgpu_connector_get_edid() and
amdgpu_connector_free_edid() to keep drm_display_info updated.
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NClaudio Suarez <cssk@net-c.es>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
Need to fix the code so it does not use reserved keywords

[how]
Change the total_length member of the cea struct
Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NOliver Logush <oliver.logush@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]

We shouldn't be accessing res_pool funcs from DM level,
therefore, we should create API and let the flow
be done in DC level.

[How]

We create new interface dp_get_link_enc to access and get the correct link_enc
Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NJude Shih <shenshih@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
The HW interrupt gets disabled after S3/S4/reset so we don't receive
notifications for HPD or AUX from DMUB - leading to timeout and
black screen with (or without) DPIA links connected.

[How]
Re-enable the interrupt after S3/S4/reset like we do for the other
DC interrupts.

Guard both instances of the outbox interrupt enable or we'll hang
during restore on ASIC that don't support it.

Fixes: 524a0ba6 ("drm/amd/display: Fix DPIA outbox timeout after GPU reset")
Reviewed-by: NJude Shih <Jude.Shih@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

dm_check_crtc_cursor() doesn't take into account plane transforms when
calculating plane scaling, this can result in false positives.

For example, if there's an output with resolution 3840x2160 and the
output is rotated 90 degrees, CRTC_W and CRTC_H will be 3840 and 2160,
respectively, but SRC_W and SRC_H will be 2160 and 3840, respectively.

Since the cursor plane usually has a square buffer attached to it, the
dm_check_crtc_cursor() will think that there's a scale factor mismatch
even though there isn't really.

This fixes an issue where kwin fails to use hardware plane transforms.

Changes since version 1:
- s/orientated/oriented/g
Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NVlad Zahorodnii <vlad.zahorodnii@kde.org>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

1. Parse DSC caps from PCON DPCD
2. Policy determins if DSC is decoded at PCON
3. Enable/disable DSC at PCON
Signed-off-by: NFangzhi Zuo <Jerry.Zuo@amd.com>
Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
PSR currently relies on the kernel's delayed vblank on/off mechanism
as an implicit bufferring mechanism to prevent excessive entry/exit.

Without this delay the user experience is impacted since it can take
a few frames to enter/exit.

[How]
Only allow vblank disable immediate for DC when psr is not supported.

Leave a TODO indicating that this support should be extended in the
future to delay independent of the vblank interrupt.

Fixes: 92020e81 ("drm/amdgpu/display: set vblank_disable_immediate for DC")
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Update the bios scratch register when updating the backlight
level.  Some platforms apparently read this scratch register
and do additional operations in their hotkey handlers.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1518Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
A warning appears in the log on GPU reset for
link_enc_cfg_link_encs_assign for the following condition:

ASSERT(state->res_ctx.link_enc_cfg_ctx.link_enc_assignments[i].valid == false);

This is not expected behavior and may result in link encoders being
incorrectly assigned.

[How]
The dc->current_state is backed up into dm->cached_dc_state before
we commit 0 streams.

DC will clear link encoder assignments on the real state but the
changes won't propagate over to the copy we made before the
0 streams commit.

DC expects that link encoder assignments are *not* valid
when committing a state, so as a workaround it needs to be cleared
before passing it back into DC.
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
We're only setting the flags on stream[0]'s planes so this logic fails
if we have more than one stream in the state.

This can cause a page flip timeout with multiple displays in the
configuration.

[How]
Index into the stream_status array using the stream index - it's a 1:1
mapping.

Fixes: cdaae837 ("drm/amd/display: Handle GPU reset for DC block")
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
DCN301 is capable of running seamless boot
if keep_stolen_vga_memory is not set.

[How]
Add a helper to check whether an ASIC can support
seamless boot and set it based on base driver flags.
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: NZhan Liu <Zhan.Liu@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Dynamic link encoder assignment expects that it can modify DC
current_state and the links associated with the incoming state when
performing full validation.

This does not align with our actual synchronization constraints
in DM's atomic_check.

[How]
Since link encoder assignment only happens as part of full validation
we can just use fast validation as part of atomic_check instead.

This satisfy's DC interface requirements and skips the DML calculations
needed for pipe programming - hopefully speeding up things a little bit
to offset the cost of double validation during stream modification.

We already do this as part of dc_commit_updates_for_stream()
with validate_bandwidth(), so extend this to dc_commit_state() as
well.
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
The HW interrupt gets disabled after GPU reset so we don't receive
notifications for HPD or AUX from DMUB - leading to timeout and
black screen with (or without) DPIA links connected.

[How]
Re-enable the interrupt after GPU reset like we do for the other
DC interrupts.

Fixes: 81927e28 ("drm/amd/display: Support for DMUB AUX")
Reviewed-by: NJude Shih <Jude.Shih@amd.com>
Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Disable vblanks immediately to save power.  I think this was
missed when we merged DC support.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1781Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
After commit ("drm/amdgpu/display: add support for multiple backlights")
number of eDPs is defined while registering backlight device.
However the panel's extended caps get updated once before register call.
That leads to regression with extended caps like oled brightness control.

[How]
Update connector ext caps after register_backlight_device

Fixes: 7fd13bae ("drm/amdgpu/display: add support for multiple backlights")
Link: https://www.reddit.com/r/AMDLaptops/comments/qst0fm/after_updating_to_linux_515_my_brightness/Signed-off-by: NRoman Li <Roman.Li@amd.com>
Tested-by: NSamuel Čavoj <samuel@cavoj.net>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NJasdeep Dhillon <Jasdeep.Dhillon@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
- Adding a DM interface to enable DSC over eDP on Linux
- DSC over eDP will allow to power savings by reducing
the bandwidth required to support panel's modes
- Apply link optimization algorithm to reduce link bandwidth
when DSC is enabled

[how]
- Read eDP panel's DSC capabilities
- Apply DSC policy on eDP panel based on its DSC capabilities
- Enable DSC encoder's on the pipe
- Enable DSC on panel's side by setting DSC_ENABLE DPCD register
- Adding link optimization algorithm to reduce link rate or lane
count based
Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: NWayne Lin <wayne.lin@amd.com>
Signed-off-by: NMikita Lipski <mikita.lipski@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

update developers with next level of info about unsupported
display configuration query that led to atomic check failure.
Signed-off-by: NShirish S <shirish.s@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Since the variables named is_end_of_payload and hpd_status are already
bool type, the ?: conditional operator is unnecessary any more.

Clean them up here.
Reported-by: NZeal Robot <zealci@zte.com.cn>
Reviewed-by: NSimon Ser <contact@emersion.fr>
Signed-off-by: NYe Guojin <ye.guojin@zte.com.cn>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Video plane gets rejected for non-zero src_y and src_x on DCN2.x.

[How]
Limit the rejection till DCN1.x and verified MPO, by dragging video
playback beyond display's left (0, 0) co-ordinates.

Fixes: d89f6048 ("drm/amd/display: Reject non-zero src_y and src_x for video planes")
Signed-off-by: NShirish S <shirish.s@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
We need HPD IRQ notifications (RX, short pulse) to properly handle
DP MST for DPIA connections.

[How]
A null pointer exception currently occurs when these are received
so add a check to validate that we have a handler installed for
the notification.

Extend the HPD handler to also handle HPD IRQ (RX) since the logic is
the same.

Fixes: e27c41d5 ("drm/amd/display: Support for DMUB HPD interrupt handling")
Reviewed-by: NWayne Lin <Wayne.Lin@amd.com>
Reviewed-by: NJude Shih <shenshih@amd.com>
Acked-by: NAnson Jacob <Anson.Jacob@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Per DRM spec we only need to hold that lock when touching
connector->state - which we do not do in that handler.

Taking this locking introduces unnecessary dependencies with other
threads which is bad for performance and opens up the potential for
a deadlock since there are multiple locks being held at once.

[How]
Remove the connection_mutex lock/unlock routine and just iterate over
the drm connectors normally. The iter helpers implicitly lock the
connection list so this is safe to do.

DC link access also does not need to be guarded since the link
table is static at creation - we don't dynamically add or remove links,
just streams.

Fixes: e27c41d5 ("drm/amd/display: Support for DMUB HPD interrupt handling")
Reviewed-by: NJude Shih <shenshih@amd.com>
Acked-by: NAnson Jacob <Anson.Jacob@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Trivial patch which adds a comment for macro
endif's in amdgpu_dm.c
Reviewed-by: NAriel Bernstein <Eric.Bernstein@amd.com>
Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com>
Acked-by: NAnson Jacob <Anson.Jacob@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAnson Jacob <Anson.Jacob@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

make action upon failure in "drm_atomic_add_affected_connectors()"
consistent with the rest of failures in amdgpu_dm_atomic_check().
Signed-off-by: NShirish S <shirish.s@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[WHY]
If timing and bpp of displays on mst hub are not changed,
pbn, slot_num for displays should not be changed. Linux
user mode may initiate atomic_check with different display
configuration after set mode finished. This will call to
amdgpu_dm to re-compute payload, slot_num of displays and
saved to dm_connect_state. stream->timing.flags.dsc, pbn,
slot_num are updated to values which may be different from
that were used for set mode. when dsc hub with 3 4k@60hz dp
connected, 3 dsc engines are enabled. timing.flags.dsc = 1.
timing.flags.dsc are changed to 0 due to atomic check. when
dsc hub is unplugged, amdgpu driver check timing.flags.dsc
for last mode set and find out flags.dsc = 0, then does not
disable dsc.

[HOW]
check status of  displays on dsc mst hubs. re-compute pbn,
slot_num, timing.flags.dsc only if there is mode, connect
or enable/disable change.
Acked-by: NAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: NHersen Wu <hersenwu@amd.com>
Reviewed-by: NMikita Lipski <Mikita.Lipski@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

commit 652de07a ("drm/amd/display: Fully switch to dmub for all dcn21
asics") switched over to using dmub on Renoir to fix Gitlab 1735, but this
implied a new dependency on newer firmware which might not be met on older
kernel versions.

Since sw_init runs before hw_init, there is an opportunity to determine
whether or not the firmware version is new to adjust the behavior.

Cc: Roman.Li@amd.com
BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1772
BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1735
Fixes: 652de07a ("drm/amd/display: Fully switch to dmub for all dcn21 asics")
Signed-off-by: NMario Limonciello <mario.limonciello@amd.com>
Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NRoman Li <Roman.Li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
DMUB binary is common for both A0 and B0. Hence, driver should
notify FW about the support for DPIA in B0.

[How]
Added dpia_supported bit in dmub_fw_boot_options and will be set
only for B0.

Assign dpia_supported to true before dm_dmub_hw_init
in B0 case.

v2: fix build without CONFIG_DRM_AMD_DC_DCN (Alex)
Signed-off-by: NJude Shih <shenshih@amd.com>
Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Notify data from outbox corrupt, the notify type should be 2 (HPD) instead of 0
(No data). We copied the address instead of the value. The memory might be
freed in the end of outbox IRQ

[How]
We should allocate the memory of notify and copy the whole content from outbox to
hpd handle function

Fixes: 88f52b1f ("drm/amd/display: Support for SET_CONFIG processing with DMUB")
Signed-off-by: NJude Shih <shenshih@amd.com>
Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
B0 has pipe mux for DIGC and DIGD which can be connected to PHYF/PHYG or
PHYC/PHY D.

[How]
Based on chip internal hardware revision id determine it is B0 and set
DMUB scratch register so DMUBFW can connect the display pipe is
connected correctly to the dig.

Cc: Wayne Lin <wayne.lin@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Acked-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NHansen <Hansen.Dsouza@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Stutter mode is a power saving feature on GPUs, however at
least one early raven system exhibits stability issues with
it.  Add a quirk to disable it for that system.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=214417
Fixes: 00544006 ("drm/amdgpu: enable gfxoff again on raven series (v2)")
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Need to guard some things with CONFIG_DRM_AMD_DC_DCN.

Fixes: 41724ea2 ("drm/amd/display: Add DP 2.0 MST DM Support")
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Dave Airlie <airlied@gmail.com>
Reviewed-by: NLyude Paul <lyude@redhat.com>
Signed-off-by: NLyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211027223914.1776061-1-alexander.deucher@amd.com

[Why]
Add DP2 MST and debugfs support

[How]
Update the slot info based on the link encoding format
Reviewed-by: N"Lin, Wayne" <Wayne.Lin@amd.com>
Signed-off-by: NBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: NFangzhi Zuo <Jerry.Zuo@amd.com>
Signed-off-by: NLyude Paul <lyude@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211025223825.301703-5-lyude@redhat.com

This reverts commits ddab8bd7 ("drm/amd/display: Fix two cursor duplication
when using overlay") and e7d9560a ("Revert "drm/amd/display: Fix overlay
validation by considering cursors"").

tl;dr ChromeOS uses the atomic interface for everything except the cursor. This
is incorrect and forces amdgpu to disable some hardware features. Let's revert
the ChromeOS-specific workaround in mainline and allow the Chrome team to keep
it internally in their own tree.

See [1] for more details. This patch is an alternative to [2], which added
ChromeOS detection.

[1]: https://lore.kernel.org/amd-gfx/JIQ_93_cHcshiIDsrMU1huBzx9P9LVQxucx8hQArpQu7Wk5DrCl_vTXj_Q20m_L-8C8A5dSpNcSJ8ehfcCrsQpfB5QG_Spn14EYkH9chtg0=@emersion.fr/
[2]: https://lore.kernel.org/amd-gfx/20211011151609.452132-1-contact@emersion.fr/Signed-off-by: NSimon Ser <contact@emersion.fr>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Sean Paul <seanpaul@chromium.org>
Fixes: ddab8bd7 ("drm/amd/display: Fix two cursor duplication when using overlay")
Fixes: e7d9560a ("Revert "drm/amd/display: Fix overlay validation by considering cursors"")
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
On renoir usb-c port stops functioning on resume after f/w update.
New dmub firmware caused regression due to conflict with dmcu.
With new dmub f/w dmcu is superseded and should be disabled.

[How]
- Disable dmcu for all dcn21.

Check dmesg for dmub f/w version.
The old firmware (before regression):
[drm] DMUB hardware initialized: version=0x00000001
All other versions require this patch for renoir.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1735Acked-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Tested-by: NMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: NRoman Li <Roman.Li@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
For optimal power savings on panels that can support it.

This was previously left disabled by default because of issues with
compositors that do not pageflip and scan out directly to the
frontbuffer.

For these compositors we now have detection methods that wait for x
number of pageflips after a full update - triggered by a buffer or
format change typically.

This may introduce bugs or new cases not tested by users so this is
only currently targeting newer DCN.

[How]
Add code in DM to set PSR state by default for newer DCN while falling
back to the feature mask for older.

Add a global debug flag that can be set to disable it for either.
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

The current logic checks whether the cursor plane blending
properties match the primary plane's. However that's wrong,
because the cursor is painted on all planes underneath. If
the cursor is over the primary plane and the overlay plane,
it's painted on both pipes.

Iterate over the CRTC planes and check their scaling match
the cursor's.

v4: fix typo in commit message (Harry)
Signed-off-by: NSimon Ser <contact@emersion.fr>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Sean Paul <seanpaul@chromium.org>
Reviewed-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
For those video format with 60 fps, the user space player could
ask for 120Hz for playback.

[How]
Add 120 in the table of common rates.
Signed-off-by: NSolomon Chiu <solomon.chiu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
Condition variable sometimes terminated unexpectedly

[How]
Use wait_for_completion_timeout to avoid unexpected termination of CV
Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: NWayne Lin <Wayne.Lin@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NJude Shih <shenshih@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
1. HPD callback function has deadlock problem
2. HPD status is not assigned
3. There is crash due to null pointer
4. link_enc is NULL in DPIA case

[How]
1. Fix deadlock problem by moving it out of the
   drm_modeset_lock
2. Assign HPD status from the notify of outbox
   from dmub FW
3. Fix the crash by checking if pin or enc exists
4. Use link_enc_cfg_get_link_enc_used_by_link to
   dynamically assign
Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: NWayne Lin <Wayne.Lin@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NJude Shih <shenshih@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
To process SET_CONFIG transactions with DMUB using inbox1 and
outbox1 mail boxes.

[How]
1) DMUB posts SET_CONFIG reply as an Outbox1 message of type
   DMUB_OUT_CMD__SET_CONFIG_REPLY.
2) The dmub async to sync mechanism for AUX is modified to accommodate
   SET_CONFIG commands for both command issue and reply code paths.
Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: NWayne Lin <Wayne.Lin@amd.com>
Acked-by: NHarry Wentland <harry.wentland@amd.com>
Signed-off-by: NJude Shih <shenshih@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>