1. 04 7月, 2016 1 次提交
    • T
      drm/tegra: dc: Implement runtime PM · 33a8eb8d
      Thierry Reding 提交于
      Use runtime PM to clock-gate, assert reset and powergate the display
      controller. This ties in nicely with atomic DPMS in that a runtime PM
      reference is taken before a pipe is enabled and dropped after it has
      been shut down.
      
      To make sure this works, make sure to only ever update planes on active
      CRTCs, otherwise register accesses to a clock-gated and reset CRTC will
      hang the CPU.
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      33a8eb8d
  2. 21 5月, 2016 1 次提交
    • D
      drm: Nuke ->vblank_disable_allowed · fcee5906
      Daniel Vetter 提交于
      This was added in
      
      commit 0a3e67a4
      Author: Jesse Barnes <jbarnes@virtuousgeek.org>
      Date:   Tue Sep 30 12:14:26 2008 -0700
      
          drm: Rework vblank-wait handling to allow interrupt reduction.
      
      to stay backwards-compatible with old UMS code that didn't even tell
      the kernel when it did a modeset, so that the kernel could
      save/restore vblank counters. At worst this means vblanks will be
      somewhat funky on a setup that very likely no one still runs.
      
      So let's just nuke it.
      
      Plan B would be to set it unconditionally in drm_vblank_init for kms
      drivers, instead of in each driver separately. So if this patch breaks
      anything please only restore the hunks in drmP.h and drm_irq.c, plus
      add a check for DRIVER_MODESET in drm_vblank_init.
      
      Stumbled over this in a discussion on irc with Chris.
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: Liviu Dudau <liviu.dudau@arm.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: Eric Anholt <eric@anholt.net>
      Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
      Cc: Inki Dae <inki.dae@samsung.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Mark Yao <mark.yao@rock-chips.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Philipp Zabel <p.zabel@pengutronix.de>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      Acked-by: NLiviu Dudau <Liviu.Dudau@arm.com>
      Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      fcee5906
  3. 17 5月, 2016 1 次提交
  4. 11 5月, 2016 1 次提交
  5. 02 5月, 2016 1 次提交
  6. 22 4月, 2016 1 次提交
  7. 09 2月, 2016 1 次提交
  8. 08 2月, 2016 1 次提交
  9. 15 12月, 2015 1 次提交
  10. 14 12月, 2015 6 次提交
  11. 24 11月, 2015 1 次提交
  12. 16 10月, 2015 1 次提交
  13. 06 10月, 2015 1 次提交
    • T
      drm/irq: Use unsigned int pipe in public API · 88e72717
      Thierry Reding 提交于
      This continues the pattern started in commit cc1ef118 ("drm/irq:
      Make pipe unsigned and name consistent"). This is applied to the public
      APIs and driver callbacks, so pretty much all drivers need to be updated
      to match the new prototypes.
      
      Cc: Christian König <christian.koenig@amd.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Cc: Inki Dae <inki.dae@samsung.com>
      Cc: Jianwei Wang <jianwei.wang.chn@gmail.com>
      Cc: Alison Wang <alison.wang@freescale.com>
      Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: Philipp Zabel <p.zabel@pengutronix.de>
      Cc: David Airlie <airlied@linux.ie>
      Cc: Rob Clark <robdclark@gmail.com>
      Cc: Ben Skeggs <bskeggs@redhat.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
      Cc: Mark Yao <mark.yao@rock-chips.com>
      Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
      Cc: Vincent Abriou <vincent.abriou@st.com>
      Cc: Thomas Hellstrom <thellstrom@vmware.com>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      88e72717
  14. 08 9月, 2015 1 次提交
    • D
      drm/atomic-helper: Add option to update planes only on active crtc · aef9dbb8
      Daniel Vetter 提交于
      With drivers supporting runtime pm it's generally not a good idea to
      touch the hardware when it's off. Add an option to the commit_planes
      helper to support this case.
      
      Note that the helpers already add all planes on a crtc when a modeset
      happens, hence plane updates will not be lost if drivers set this to
      true.
      
      v2: Check for NULL state->crtc before chasing the pointer. Also check
      both old and new crtc if there's a switch. Finally just outright
      disallow switching crtcs for a plane if the plane is in active use, on
      most hardware that doesn't make sense.
      
      v3: Since commit_planes(active_only = true) is for enabling things
      only after all the crtc are on we should only look at the new crtc to
      decide whether to call the plane hooks - if the current CRTC isn't on
      then skip. If the old crtc (when moving a plane) went down then the
      plane should have been disabled as part of the pipe shutdown work
      already. For which there's currently no helper really unfortunately.
      Also move the check for wether a plane gets a new CRTC assigned while
      still in active use out of this patch.
      
      v4: Rebase over exynos changes.
      
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Thierry Reding <treding@nvidia.com>
      Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
      Reviewed-by: NThierry Reding <treding@nvidia.com>
      Tested-by: NThierry Reding <treding@nvidia.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>
      aef9dbb8
  15. 13 8月, 2015 9 次提交
  16. 12 6月, 2015 1 次提交
  17. 08 5月, 2015 1 次提交
  18. 03 4月, 2015 2 次提交
  19. 24 2月, 2015 1 次提交
  20. 27 1月, 2015 7 次提交