ACPI part of the driver accidentally used sizeof(*ssp) instead of the
correct sizeof(*pdata). This leads to nasty memory corruptions like the one
below:

    BUG: unable to handle kernel paging request at 0000000749fd30b8
    IP: [<ffffffff813fe8a1>] __list_del_entry+0x31/0xd0
    PGD 0
    Oops: 0000 [#1] PREEMPT SMP
    Modules linked in:
    CPU: 0 PID: 30 Comm: kworker/0:1 Not tainted 3.10.0-rc6v3.10-rc6_sdhci_modprobe+ #443
    task: ffff8801483a0940 ti: ffff88014839e000 task.ti: ffff88014839e000
    RIP: 0010:[<ffffffff813fe8a1>]  [<ffffffff813fe8a1>] __list_del_entry+0x31/0xd0
    RSP: 0000:ffff88014839fde8  EFLAGS: 00010046
    RAX: ffff880149fd30b0 RBX: ffff880149fd3040 RCX: dead000000200200
    RDX: 0000000749fd30b0 RSI: ffff880149fd3058 RDI: ffff88014834d640
    RBP: ffff88014839fde8 R08: ffff88014834d640 R09: 0000000000000001
    R10: ffff8801483a0940 R11: 0000000000000001 R12: ffff880149fd3040
    R13: ffffffff810e0b30 R14: ffff8801483a0940 R15: ffff88014834d640
    FS:  0000000000000000(0000) GS:ffff880149e00000(0000) knlGS:0000000000000000
    CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
    CR2: 0000000000000168 CR3: 0000000001e0b000 CR4: 00000000001407f0
    DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
    DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
    Stack:
     ffff88014839fe48 ffffffff810e0baf ffffffff81120abd ffff88014839fe20
     ffff8801483a0940 ffff8801483a0940 ffff8801483a0940 ffff8801486b1c90
     ffff88014834d640 ffffffff810e0b30 0000000000000000 0000000000000000
    Call Trace:
     [<ffffffff810e0baf>] worker_thread+0x7f/0x390
     [<ffffffff81120abd>] ? trace_hardirqs_on+0xd/0x10
     [<ffffffff810e0b30>] ? manage_workers.isra.22+0x2b0/0x2b0
     [<ffffffff810e6c09>] kthread+0xd9/0xe0
     [<ffffffff810f93df>] ? local_clock+0x3f/0x50
     [<ffffffff810e6b30>] ? kthread_create_on_node+0x110/0x110
     [<ffffffff818c5dec>] ret_from_fork+0x7c/0xb0
     [<ffffffff810e6b30>] ? kthread_create_on_node+0x110/0x110

Fix this by using the right structure size in devm_kzalloc().
Reported-by: NJerome Blin <jerome.blin@intel.com>
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NMark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org # 3.9+

pxa2xx_spi_map_dma_buffer() gets called in tasklet context so we can't
sleep when we allocate a new sg table. Use GFP_ATOMIC here instead.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NMark Brown <broonie@linaro.org>
Cc: stable@vger.kernel.org

If the device is already in a runtime PM enabled state
pm_runtime_get_sync() will return 1, so a test for negative
value should be used to check for errors.

Without this patch there are seen errors like:

[    8.540000] s3c64xx-spi 13930000.spi: Failed to enable device: 1
[    8.545000] spi_master spi1: failed to prepare transfer hardware

Likely because the driver uses synchronous API to runtime enable
the device and asynchronous one to disable it.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mark Brown <broonielinaro.org>
Cc: stable@vger.kernel.org

Current HSPI driver is using msleep(20) on hspi_status_check_timeout(),
but it was too long delay for SPI device.
Bock-W board SPI access was too slow without this patch.
This patch uses udelay(10) for it.
Tested-by: NYusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The ISR currently consumes the rx buffer data and re-enables transmission
from within interrupt context. This is bad because if the interrupt
occurs again before the ISR exits, the new interrupt will be erroneously
cleared by the still completing ISR.

Simplified the ISR by just setting the completion variable and exiting with
no action. Then just looped the transmit functionality in
xilinx_spi_txrx_bufs().
Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Fix to return -ENOMEM in the platform_device_alloc() error handling
case instead of 0, as done elsewhere in this function.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

free_irq() expects the same pointer that was passed to request_irq(), otherwise
the IRQ is not freed.

The issue was found using the following coccinelle script:

<smpl>
@r1@
type T;
T devid;
@@
request_irq(..., devid)

@r2@
type r1.T;
T devid;
position p;
@@
free_irq@p(..., devid)

@@
position p != r2.p;
@@
*free_irq@p(...)
</smpl>
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NStephen Warren <swarren@nvidia.com>

Fix using PIO transfer mode only support 8 bits transfer, doesn't support 16 bits.
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Since we will remove items off the list using list_del_init() we need
to use a safe version of the list_for_each_entry() macro aptly named
list_for_each_entry_safe().
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NMark Brown <broonie@sirena.org.uk>

Add the missing platform_driver_unregister() before return
from pch_spi_init() in the error handling case.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Add dmaengine support.

Using "has_dma_support" member of struct is used to select
the transfer mode: dmaengine or pdc.

For the dmaengine transfer mode, it supports both 8 bits and 16 bits transfer.

For the dmaengine transfer mode, if it fails to config dmaengine,
or if the message length is less than 16 bytes, it will use the PIO transfer mode.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
[wenyou.yang@atmel.com: using "has_dma_support" to select dmaengine as the spi xfer mode]
[wenyou.yang@atmel.com: fix DMA: OOPS if buffer > 4096 bytes]
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
[richard.genoud@gmail.com: update with dmaengine interface]
[richard.genoud@gmail.com: fix __init/__devinit sections mismatch]
[richard.genoud@gmail.com: adapt to slave_config changes]
[richard.genoud@gmail.com: add support t0 16 bits transfer]
Tested-by: NRichard Genoud <richard.genoud@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Will allow to drop the lock during DMA operations.

Replacing non-irqsave versions with irqsave versions of the lock
to make it correct in both pdc and dmaengine transfer mode
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Tested-by: NRichard Genoud <richard.genoud@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Needed for future use with dmaengine enabled driver.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
[wenyou.yang@atmel.com: submit the patch]
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Tested-by: NRichard Genoud <richard.genoud@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

This fixes building the spi-sirf driver as a loadable module, which uses
an incorrect MODULE_DEVICE_TABLE, by changing the reference to the
correct symbol.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Don't silently ignore errors, report them.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The multiplatform conversion in commit 788437 (spi: s3c64xx: move to
generic dmaengine API) tested for the use of the Samsung-specific DMA
API with SAMSUNG_DMADEV when in fact S3C_DMA should be used. This
renderd DMA based transfers non-functional on platforms not using
dmaengine.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Fix to return a negative error code from the error handling
case instead of 0, as returned elsewhere in this function.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Follow DT naming convention for compatible property of the blob.
Use first chip name that introduced the specific version of the
device.
Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

With device core now able to setup the default pin configuration,
the pin configuration code based on the deprecated Samsung specific
gpio bindings is removed.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NGrant Likely <grant.likely@linaro.org>

GENERIC_GPIO is now equivalent to GPIOLIB and features that depended on
GENERIC_GPIO can now depend on GPIOLIB to allow removal of this option.
Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>

Selecting CONFIG_DMADEVICES is optional, and we must
be able to continue even without DMA. Otherwise things
like omap4430sdp nfsroot will fail if DMA is not
selected.

Note that the driver already supports PIO mode, but
we fail to fall back to PIO if requesting DMA channels
fails.
Signed-off-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The spi-s3c64xx uses a Samsung proprietary interface for
talking to the DMA engine, which does not work with
multiplatform kernels.

This version of the patch leaves the old code in place,
behind an #ifdef. This can be removed in the future,
after the s3c64xx platform start supporting the regular
dmaengine interface. An earlier version of this patch was
tested successfully on exynos5250 by Padma Venkat.

The conversion was rather mechanical, since the samsung
interface is just a shallow wrapper around the dmaengine
interface.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

spi_bitbang_setup() deasserts the chip select line to initialise
the device. The chip select GPIO line is obtained from
spi_gpio->cs_gpios[] private data.
Currently, devices that are not registered under devicetree
environment will call into spi_bitbang_setup() with stale
cs_gpios[].

This patch ensures spi_gpio->cs_gpios[] is always initialised prior
to calling spi_bitbang_setup().
Reviewed-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NJosef Ahmad <josef.ahmad@intel.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

There is no need to disable transmitter/receiver after each loop
iteration and re-enable it for next loop iteration. Enable the
transmitter/receiver before xfer loop starts and disable it when
the whole transfer is done.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Currently the driver only uses one internal chip select.
Add support for gpio chip selects configured by cs-gpios
DT binding.
Signed-off-by: NAnatolij Gustschin <agust@denx.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

speed_hz is a write only member, so we can safely remove it and its
generation. Also fixes the missing clk_put after getting the periph
clock.
Signed-off-by: NJonas Gorski <jogo@openwrt.org>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Neither tegra20_spi_cdata nor tegra30_spi_cdata are used outside this
file so they can, and should, be static.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Use the newly introduced devm_ioremap_resource() instead of
devm_request_and_ioremap() which provides more consistent error handling.

devm_ioremap_resource() provides its own error messages; so all explicit
error messages can be removed from the failure code paths.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Fix below module build error:

  CC [M]  drivers/spi/spi-davinci.o
drivers/spi/spi-davinci.c:774:1: error: '__mod_of_device_table' aliased
to undefined symbol 'davini_spi_of_match'
drivers/spi/spi-davinci.c:774:1: error: '__mod_of_device_table' aliased
to undefined symbol 'davini_spi_of_match'
make[2]: *** [drivers/spi/spi-davinci.o] Error 1
make[1]: *** [drivers/spi] Error 2
make[1]: *** Waiting for unfinished jobs....
make: *** [drivers] Error 2
Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com>
Acked-by: NSekhar Nori <nsekhar@ti.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This makes sure that an error is returned on an incorrectly formed
"cs-gpios" property, but reports success when the "cs-gpios" property is
well formed or missing.

When holes in the cs-gpios property phandle list is used to indicate
that some other form of chipselect is to be used it is important that
failure to read a broken "cs-gpios" property does not silently fail
leading to the spi controller to use an unintended chipselect.
Signed-off-by: NAndreas Larsson <andreas@gaisler.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The return value from of_get_named_gpio is -ENOENT when the given index
matches a hole in the "cs-gpios" property phandle list. However, the
default value of cs_gpio in struct spi_device and entries of cs_gpios in
struct spi_master is -EINVAL, which is documented to indicate that a
GPIO line should not be used for the given spi_device.

This sets the default value of cs_gpio in struct spi_device and entries
of cs_gpios in struct spi_master to -ENOENT. Thus, -ENOENT is the only
value used to indicate that no GPIO line should be used.
Signed-off-by: NAndreas Larsson <andreas@gaisler.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

atmel_spi_transfer() would check speed_hz and fail if
the speed was changed in the transfer. After commit
"spi: make sure all transfer has proper speed set"
this would happen on all transfers.

Change speed_hz check to only fail if a lower speed
than max is requested.
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller
is different than the older SoCs SPI controller in internal design as
well as register interface.

This driver supports the:
- non DMA based transfer for smaller transfer i.e. less than FIFO depth.
- APB DMA based transfer for larger transfer i.e. more than FIFO depth.
- Clock gating through runtime PM callbacks.
- registration through DT only.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver. Platform data is
therefore no longer required. Rework the driver to parse the device tree
directly into struct tegra_slink_data.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Tegra only supports, and always enables, device tree. Remove all ifdefs
and runtime checks for DT support from the driver. Platform data is
therefore no longer required. Rework the driver to parse the device tree
directly into struct tegra_sflash_data.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

There is no code to set spi->controller_data, and hence the HW CS logic
can never trigger. Remove the unused code.
Signed-off-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This relies upon of_spi_register_master to find out which gpios to use.
Acked-by: NAnton Vorontsov <anton@enomsg.org>
Signed-off-by: NAndreas Larsson <andreas@gaisler.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This adds support for the mostly register-compatible SPICTRL cores from the
GRLIB VHDL IP core library from Aeroflex Gaisler. They are normally running on
SPARC. A different entry in of_fsl_spi_match matches this core and indicates a
different hardware type that is used to set up different function pointers and
special cases.

The GRLIB core operates in cpu mode. The number of bits per word might be
limited. There might be native chipselects selected via a slave select
register. These differences to the FSL type cores, if present, are indicated by
a capabilities register. Other register and function differences exists but are
not relevant to the driver.
Acked-by: NAnton Vorontsov <anton@enomsg.org>
Signed-off-by: NAndreas Larsson <andreas@gaisler.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Acked-by: NAnton Vorontsov <anton@enomsg.org>
Signed-off-by: NAndreas Larsson <andreas@gaisler.com>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>