Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Add a common clock driver for basic gpio controlled clock multiplexers.
This driver can be used for devices like 5V41068A or 831721I from IDT
or for discrete multiplexer circuits. The 'select' pin selects one of
two parent clocks.

Cc: Jyri Sarha <jsarha@ti.com>
Signed-off-by: NSergej Sawazki <ce3a@gmx.de>
[sboyd@codeaurora.org: Fix error paths to free memory and do it
in the correct order]
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

Add the devicetree binding for the cru on the rk3368 which quite similar
structured as previous clock controllers.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

To please checkpatch and the tiresome reader, add the "atmel," prefix to the
USB udc compatible string.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: <stable@vger.kernel.org>  #4.0+
Signed-off-by: NKevin Hilman <khilman@linaro.org>

The mvneta driver supports the Ethernet IP found in the Armada 370, XP,
380 and 385 SoCs. Since at least one more hardware feature is available
for the Armada XP SoCs then a way to identify them is needed.

This patch introduces a new compatible string "marvell,armada-xp-neta".
Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
Fixes: c5aff182 ("net: mvneta: driver for Marvell Armada 370/XP network unit")
Cc: <stable@vger.kernel.org> # v3.8+
Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>

Sometimes the irq line is not connected to any soc-pin. This does
not hinder basic timekeeping functionality of the rtc, so probe
should not fail in this case.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>

Add support for the Arria10 SDRAM EDAC. Update the bindings document for
the new match string.
Signed-off-by: NThor Thayer <tthayer@opensource.altera.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-5-git-send-email-tthayer@opensource.altera.comSigned-off-by: NBorislav Petkov <bp@suse.de>

To fix it, use the chance to rename according the compatible string,
which is "lantiq,pinctrl-falcon" and  "lantiq,pinctrl-xway"
Signed-off-by: NThomas Langer <thomas.langer@lantiq.com>
Cc: John Crispin <blogic@openwrt.org>
Signed-off-by: NRob Herring <robh@kernel.org>

Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NRob Herring <robh@kernel.org>

Simple LAN device for debug or management purposes.
Device supports interrupts for RX and TX(completion).
Device does not have DMA ability.
Signed-off-by: NNoam Camus <noamc@ezchip.com>
Signed-off-by: NTal Zilcer <talz@ezchip.com>
Acked-by: NAlexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add constants and callback functions for the dwmac on rk3368 socs.
As can be seen, the base structure is the same, only registers and
the bits in them moved slightly.
Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Add sama5d2 to the biding documentation for this use of the GEM IP.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

On sama5d4, we only have a GEM IP that is configured to do 10/100 Mbits. So the
use of "Gigabit" can be confusing.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

In the driver and the DT bindings we use the "atmel" prefix. Fix it in the
binding documentation.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>

h8300_timer8: 8bit clockevent device
h8300_timer16 / h8300_tpu: 16bit clocksource
Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>

Signed-off-by: NYoshinori Sato <ysato@users.sourceforge.jp>
Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>

This adds documentation of device tree bindings for the clock related
portions of the STM32 RCC block.
Signed-off-by: NDaniel Thompson <daniel.thompson@linaro.org>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>

This patch adds documentation for a pinctrl-names property.
The property, when present, is used for switching the source
of the strobe signal for the device.
Signed-off-by: NJacek Anaszewski <j.anaszewski@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Cc: Bryan Wu <cooloney@gmail.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Cc: devicetree@vger.kernel.org
Acked-by: NSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: NBryan Wu <cooloney@gmail.com>

Instead of (partly) open coding watchdog_init_timeout to determine the
inital timeout use the core function that exists for exactly this
purpose.

As a side effect the "timeout-sec" device-tree property is recognized now
(though currently unused in the omap device trees).
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

ti,hwmods doesn't belong into the compatible section but is a property
on it's own. Also reformat the section of required properties to match the
usual style of dt binding documents.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Reviewed-by: NFelipe Balbi <balbi@ti.com>
Acked-by: NFelipe Balbi <balbi@ti.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Add a device tree binding documentation to the watchdog hardware block on the
Conexant CX92755 SoC. The CX92755 is from the Digicolor SoCs series. Other SoCs
in that series may share the same hardware block.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

On current ST platforms the LPC controls a number of functions including
Watchdog and Real Time Clock.  This patch provides the bindings used to
configure LPC in Watchdog mode.
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

On few platforms, for power efficiency, we want the device to be
configured for a specific OPP while we put the device in suspend state.

Add an optional property in operating-points-v2 bindings for that.
Suggested-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NNishanth Menon <nm@ti.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

On some platforms (Like Qualcomm's SoCs), it is not decided until
runtime on what OPPs to use. The OPP tables can be fixed at compile
time, but which table to use is found out only after reading some efuses
(sort of an prom) and knowing characteristics of the SoC.

To support such platform we need to pass multiple OPP tables per device
and hardware should be able to choose one and only one table out of
those.

Update operating-points-v2 bindings to support that.
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

Current OPP (Operating performance point) device tree bindings have been
insufficient due to the inflexible nature of the original bindings. Over
time, we have realized that Operating Performance Point definitions and
usage is varied depending on the SoC and a "single size (just frequency,
voltage) fits all" model which the original bindings attempted and
failed.

The proposed next generation of the bindings addresses by providing a
expandable binding for OPPs and introduces the following common
shortcomings seen with the original bindings:

- Getting clock/voltage/current rails sharing information between CPUs.
  Shared by all cores vs independent clock per core vs shared clock per
  cluster.

- Support for specifying current levels along with voltages.

- Support for multiple regulators.

- Support for turbo modes.

- Other per OPP settings: transition latencies, disabled status, etc.?

- Expandability of OPPs in future.

This patch introduces new bindings "operating-points-v2" to get these problems
solved. Refer to the bindings for more details.

We now have multiple versions of OPP binding and only one of them should
be used per device.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: NRob Herring <robh@kernel.org>
Reviewed-by: NStephen Boyd <sboyd@codeaurora.org>
Acked-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>

Add device tree bindings for the DA9063 OnKey driver.
Signed-off-by: NSteve Twiss <stwiss.opensource@diasemi.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Signed-off-by: NRichard Fitzgerald <rf@opensource.wolfsonmicro.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Fix typo in 'Multifunction'.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This patch adds device tree binding documentation for
the flash cell of the Maxim max77693 multifunctional device.
Signed-off-by: NJacek Anaszewski <j.anaszewski@samsung.com>
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NSakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

MIC must be initilized by MIPI DSI when it is being bound.
Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

This patch adds support for Exynos5433 mipi dsi.
Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk
is actually not the pll input clock for dsi. The pll input clock comes
from the board's oscillator directly. But for the backward
compatibility, the old clock name "pll_clk" is also OK.
Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

MIC(Mobile image compressor) is newly added IP in Exynos5433. MIC
resides between decon and mipi dsim, and compresses frame data by 50%.
With dsi, not display port, to send frame data to the panel, the
bandwidth is not enough. That is why this compressor is introduced.
Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

DECON(Display and Enhancement Controller) is new IP replacing FIMD in
Exynos5433. This patch adds Exynos5433 decon driver.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>

Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>