1. 16 5月, 2018 4 次提交
    • A
      drm/amdgpu: print the vbios version in the debugfs firmware info · 32d8c662
      Alex Deucher 提交于
      Useful for info gathering about what firmwares are in use in
      the driver.
      Reviewed-by: NHuang Rui <ray.huang@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      32d8c662
    • S
      drm/amdgpu: defer test IBs on the rings at boot (V3) · 2c773de2
      Shirish S 提交于
      amdgpu_ib_ring_tests() runs test IB's on rings at boot
      contributes to ~500 ms of amdgpu driver's boot time.
      
      This patch defers it and ensures that its executed
      in amdgpu_info_ioctl() if it wasn't scheduled.
      
      V2: Use queue_delayed_work() & flush_delayed_work().
      V3: removed usage of separate wq, ensure ib tests is
          run before enabling clockgating.
      Signed-off-by: NShirish S <shirish.s@amd.com>
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      2c773de2
    • R
      drm/amd/pp: Remove struct pp_gpu_power · 5b79d048
      Rex Zhu 提交于
      Currently smu only calculate average gpu power in real time.
      
      for vddc/vddci/max power,
      User need to set start time and end time, firmware can calculate
      the average vddc/vddci/max power. but the type of return values
      is not unified. For Vi, return type is uint.
      For vega, return type is float.
      
      so this struct can't be suitable for all asics.
      Acked-by: NAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NRex Zhu <Rex.Zhu@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      5b79d048
    • E
      drm/gpu-sched: fix force APP kill hang(v4) · 8ee3a52e
      Emily Deng 提交于
      issue:
      there are VMC page fault occurred if force APP kill during
      3dmark test, the cause is in entity_fini we manually signal
      all those jobs in entity's queue which confuse the sync/dep
      mechanism:
      
      1)page fault occurred in sdma's clear job which operate on
      shadow buffer, and shadow buffer's Gart table is cleaned by
      ttm_bo_release since the fence in its reservation was fake signaled
      by entity_fini() under the case of SIGKILL received.
      
      2)page fault occurred in gfx' job because during the lifetime
      of gfx job we manually fake signal all jobs from its entity
      in entity_fini(), thus the unmapping/clear PTE job depend on those
      result fence is satisfied and sdma start clearing the PTE and lead
      to GFX page fault.
      
      fix:
      1)should at least wait all jobs already scheduled complete in entity_fini()
      if SIGKILL is the case.
      
      2)if a fence signaled and try to clear some entity's dependency, should
      set this entity guilty to prevent its job really run since the dependency
      is fake signaled.
      
      v2:
      splitting drm_sched_entity_fini() into two functions:
      1)The first one is does the waiting, removes the entity from the
      runqueue and returns an error when the process was killed.
      2)The second one then goes over the entity, install it as
      completion signal for the remaining jobs and signals all jobs
      with an error code.
      
      v3:
      1)Replace the fini1 and fini2 with better name
      2)Call the first part before the VM teardown in
      amdgpu_driver_postclose_kms() and the second part
      after the VM teardown
      3)Keep the original function drm_sched_entity_fini to
      refine the code.
      
      v4:
      1)Rename entity->finished to entity->last_scheduled;
      2)Rename drm_sched_entity_fini_job_cb() to
      drm_sched_entity_kill_jobs_cb();
      3)Pass NULL to drm_sched_entity_fini_job_cb() if -ENOENT;
      4)Replace the type of entity->fini_status with "int";
      5)Remove the check about entity->finished.
      Signed-off-by: NMonk Liu <Monk.Liu@amd.com>
      Signed-off-by: NEmily Deng <Emily.Deng@amd.com>
      Reviewed-by: NChristian König <christian.koenig@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      8ee3a52e
  2. 12 4月, 2018 1 次提交
  3. 21 3月, 2018 1 次提交
  4. 20 2月, 2018 7 次提交
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