1. 30 8月, 2013 1 次提交
    • T
      ASoC: Samsung: Do not queue cyclic buffers multiple times · 9b9ae16a
      Tomasz Figa 提交于
      The legacy S3C-DMA API required every period of a cyclic buffer to be
      queued separately. After conversion of Samsung ASoC to Samsung DMA
      wrappers somebody made an assumption that the same is needed for DMA
      engine API, which is not true.
      
      In effect, Samsung ASoC DMA code was queuing the whole cyclic buffer
      multiple times with a shift of one period per iteration, leading to:
        a) severe memory waste - up to 13x times more DMA transfer descriptors
           are allocated than needed,
        b) possible memory corruption, because further cyclic buffers were out
           of the original buffers, due to the offset.
      
      This patch fixes this problem by making the legacy S3C-DMA API use the
      same semantics as DMA engine (the whole cyclic buffer is enqueued at
      once) and modifying users of Samsung DMA wrappers in cyclic mode to
      behave appropriately.
      Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
      Acked-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      9b9ae16a
  2. 29 1月, 2013 1 次提交
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