Updates the 4G Systems MTX-1 defconfig, and remove systems unavailable
on this platform.  Changes include:

- built-in MTD char/block support
- GPIO sysfs support
- MTX-1 watchdog driver
- I2C over GPIO driver as a module
- SquashFS support
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1168/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Update Broadcom BCM47xx defconfig with:

- tiny RCU
- BCM47xx watchdog driver
- b43/b43legacy wireless as modules
- SSB Gigabit Ethernet driver
- disabled IRDA

6igned-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1167/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This updates the Mikrotik RB532 defconfig with:

- tiny RCU
- RB532 input buttons driver
- RB532 LED driver
- RC32434 watchdog driver
- GPIO sysfs support
- Wireless support
- SquashFS support
- more LED triggers
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1166/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Update Texas Instruments AR7 defconfig with:

- tiny RCU
- LEDs GPIO
- disable SSB
- enable zboot support
- enable GPIO sysfs support
Signed-off-by: NFlorian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1165/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Removes some out-of-date comments and empty lines.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1204/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The _EXL, _KERNEL etc. bits are in the performance control register so
use _PERFCTRL prefix instead of _PERFCNT.  While at it make the macro
more readable, use _ENABLE instead of _INT_EN suffix to describe the
interrupt enable bit.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1203/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1202/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1201/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Unified macro for counter0 and counter1 to set the event in the control
register.  This will be needed by Perf.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1200/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The "nofpu" and "nodsp" kernel command line options currently do not
affect CPUs that are brought online later in the boot process or
hotplugged at runtime.  It is desirable to apply the nofpu/nodsp options
to all CPUs in the system, so that surprising results are not seen when
a process migrates from one CPU to another.

[Ralf: Moved definitions of mips_fpu_disabled, fpu_disable,
mips_dsp_disabled and dsp_disable from setup.c to cpu-probe.c to allow
making mips_fpu_disabled and mips_dsp_disabled static.]
Signed-off-by: NKevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1169/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Modifications to the boot memory allocation structures to make them easier
to read and maintain. Note that this will not pass checkpatch because
it wants a structure element initializer to be enclosed in a
do {...} while(...), which is obvious nonsensical.
Signed-off-by: NDavid VomLehn <dvomlehn@cisco.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1207/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Replaces references to the magic number 0x3 with constants and macros
indicating the real purpose of those bits.  They are the rounding mode
bits of the FCSR register.
Signed-off-by: NShane McDonald <mcdonald.shane@gmail.com>
To: anemo@mba.ocn.ne.jp
To: kevink@paralogos.com
To: linux-mips@linux-mips.org
To: sshtylyov@mvista.com
Patchwork: http://patchwork.linux-mips.org/patch/1206/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NArnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1163/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add a sysdev for DBDMA PM.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1119/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Use a sysdev to implement PM methods for the Au1000 interrupt controllers.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1114/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Clean out stray unused board_reset() calls in pb1x boards, the PB1000 is
different from the rest and gets private methods.

(Cleanup after 32fd6901)
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1085/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Loongson doesn't support MIPSR2, therefore, MIPSR2 vectored interrupts
(cpu_has_vint) and MIPSR2 external interrupt controller mode
(cpu_has_veic) are 0.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1112/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

From: Julia Lawall <julia@diku.dk>

Use set_cpus_allowed_ptr rather than set_cpus_allowed.

The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression E1,E2;
@@

- set_cpus_allowed(E1, cpumask_of_cpu(E2))
+ set_cpus_allowed_ptr(E1, cpumask_of(E2))

@@
expression E;
identifier I;
@@

- set_cpus_allowed(E, I)
+ set_cpus_allowed_ptr(E, &I)
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
To: peterz@infradead.org
To: mingo@elte.hu
To: tglx@linutronix.de
To: oleg@redhat.com
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
To: kernel-janitors@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1087/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This allows bin_attr->read,write,mmap callbacks to check file specific data
(such as inode owner) as part of any privilege validation.
Signed-off-by: NChris Wright <chrisw@sous-sol.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

In preparation for removing volatile from the atomic_t definition, this
patch adds a volatile cast to all the atomic read functions.
Signed-off-by: NAnton Blanchard <anton@samba.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

    
    The interrupt enable bit for the performance counters is in the Control
    Register $24, not in the counter register.
    loongson2_perfcount_handler(), we need to use
Reported-by: NXu Hengyang <hengyang@mail.ustc.edu.cn>
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
    Cc: linux-mips@linux-mips.org
    Patchwork: http://patchwork.linux-mips.org/patch/1198/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

---

    
    The sys_ppoll() takes struct 'struct timespec'. This is different for the
    N32 and N64 ABIs. Use the compat version to do the proper conversions.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
    To: linux-mips@linux-mips.org
    Patchwork: http://patchwork.linux-mips.org/patch/1210/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

---

    
    In the FPU emulator code of the MIPS, the Cause bits of the FCSR register
    are not currently writeable by the ctc1 instruction.  In odd corner cases,
    this can cause problems.  For example, a case existed where a divide-by-zero
    exception was generated by the FPU, and the signal handler attempted to
    restore the FPU registers to their state before the exception occurred.  In
    this particular setup, writing the old value to the FCSR register would
    cause another divide-by-zero exception to occur immediately.  The solution
    is to change the ctc1 instruction emulator code to allow the Cause bits of
    the FCSR register to be writeable.  This is the behaviour of the hardware
    that the code is emulating.
    
    This problem was found by Shane McDonald, but the credit for the fix goes
    to Kevin Kissell.  In Kevin's words:
    
    I submit that the bug is indeed in that ctc_op:  case of the emulator.  The
    Cause bits (17:12) are supposed to be writable by that instruction, but the
    CTC1 emulation won't let them be updated by the instruction.  I think that
    actually if you just completely removed lines 387-388 [...] things would
    work a good deal better.  At least, it would be a more accurate emulation of
    the architecturally defined FPU.  If I wanted to be really, really pedantic
    (which I sometimes do), I'd also protect the reserved bits that aren't
    necessarily writable.
Signed-off-by: NShane McDonald <mcdonald.shane@gmail.com>
    To: anemo@mba.ocn.ne.jp
    To: kevink@paralogos.com
    To: sshtylyov@mvista.com
    Patchwork: http://patchwork.linux-mips.org/patch/1205/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

---

Signed-off-by: NAndreas Dilger <adilger@dilger.ca>
Acked-by: NKOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

The -mfix-loongson2f-jump option provided by latest CVS binutils have fixed
the out-of-order issue of Loongson-2F described in chapter 15 of the
Loongson2F User Manual [1, 2], but introduced some problems.

The option changes all of the jump target to "addr & 0xcfffffff" through the
at($1) register, but for the reboot address of Loongson 2F 0xbfc00000 this is
wrong.  Avoids the problem via telling the assembler to not use the $at
register.

[1] Loongson2F User Manual (Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[2] English Version of Chapter 15:
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=sourceReported-and-tested-by: NLiu Shiwei <liushiwei@gmail.com>
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1109/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1106/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

With the  "Fixups of Loongson2F" patch [1] having been applied to binutils
for binutils 2.20.1 we now can use it's time to enable the options provided
by the patch to compile the kernel.

Without these fixups, the system may hang if the erratum is triggered.

For more information on these fixups please refer to the following
references.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
    http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[3] Chapter 15 of the English version Loongson 2F User Manual
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=sourceSigned-off-by: NZhang Le <r0bertz@gentoo.org>
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1106/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

As documented in the  Loongson 2F User Manual [2, 3], the old Loongson2F
series (2F01 / 2F02) have the NOP & JUMP issues which requires workarounds
in the kernel and binutils.  This issue has been rectified in Loongson 2F
series 2F03 so no workarounds needed.

Now that the workarounds [1] adding the the -mfix-loongson2f-nop and
-mfix-loongson2f-jump options have been comitted to the binutils the CVS
repository), we can add the workarounds in the kernel.

The workarounds have no significant side effect on the system but may
decrease performance so we control them through a a new
CPU_LOONGSON2F_WORKAROUNDS config option allowing the users to only enable
it as necessary.

[1] "Fixups of Loongson2F" patch for binutils(actually for gas)
    http://sourceware.org/ml/binutils/2009-11/msg00387.html
[2] Chapter 15 of "Loongson2F User Manual"(Chinese Version)
    http://www.loongson.cn/uploadfile/file/200808211
[3] English Version of the above chapter 15
    http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode=sourceSigned-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1105/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NFlorian Fainelli <ffainelli@freebox.fr>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1082/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

the defconfig was out-of-sync since 2.6.30-rc6, update it with the new
symbols and enable BCM6338, 6345, wireless, b43 driver and LEDs support.
Signed-off-by: NFainelli <ffainelli@freebox.fr>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1081/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

When the oprofile is compiled as a module do_IRQ() is not called in
arch/mips/loongson/lemote-2f/irq.c due to a wrong #ifdef there.
Signed-off-by: NWu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1143/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

There's a typo in the LOONGSON_ADDRWIN_CFG macro. The cpu window mmap
register address should contain the destination parameters not the
source one.  This has not been noticed because the code is only using
source = destination.
Signed-off-by: NArnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1162/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The check used to determine if uncached accelerated should be used or not
is wrong. The parenthesis are misplaced and making the test fail.
Signed-off-by: NArnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1161/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This allows to use all display device for instance DISPLAY_OTHER like SM501.
Signed-off-by: NArnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1160/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

It's not "gidum" but "gdium".
Signed-off-by: NArnaud Patard <apatard@mandriva.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1159/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

"MIPS: Calculate proper ebase value for 64-bit kernels"
9af43ea080dd5d6c7b34f38261780e5dd43537bc (lmo) rsp.
f6be75d0 (kernel.org) broke some 64-bit
MIPS systems.

Before this we were using XKPHYS/cached as ebase and computed the uncached
xphsys/unchached address for that area. After that commit ebase became a
32-bit compat address and convert does not work anymore.  We now should use
CKSEG1 for this. CKSEG1ADDR does just that in 32-bit and 64-bit.
Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc>
To: Ralf Baechle <ralf@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1149/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

For some combinations of PAGE_SIZE and vmbits, it is possible to have
userspace access that are beyond what is covered by the PGD, but within
vmbits.  Such an access would cause the TLB refill handler to load garbage
values for PMD and PTE potentially giving userspace access to parts of the
physical address space to which it is not entitled.

In the TLB refill hot path, we add a single dsrl instruction so we can
check if any bits outside of the range covered by the PGD are set.  In
the vmalloc side we then separate the bad case from the normal vmalloc
case and call tlb_do_page_fault_0 if warranted.  This slows us down a
bit, but has the benefit of yielding deterministic behavior.

[Ralf: Fixed build error for 32-bit kernels.]
[Ralf: Folded lmo commit c8c0e22b2aa3982852b44279638ef37f9aa31b7d into this
 commit.]
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1152/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

---

This makes the code somewhat cleaner while reducing the risk of shift
amount overflows when various page table related options are changed.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1154/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This allows us to clean up the code by not having to explicitly code
checks for shift amounts greater than 32.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1153/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The MIPS implementation of die() forgets to call notify_die() and thus notifiers
registered via register_die_notifier() are not called.  This results in kgdb not
being activated on exceptions.

The only subtlety is that notify_die declares its regs argument w/o const, so
the const had to be removed from mips die() as well.

[Ralf: Fixed build error for SGI IP22 and IP28 platforms.]
Signed-off-by: NYury Polyanskiy <ypolyans@princeton.edu>
Cc: linux-mips@linux-mips.org
Patchworks: http://patchwork.linux-mips.org/patch/1142/Acked-by: NJason Wessel <jason.wessel@windriver.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

---