- 02 8月, 2010 6 次提交
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由 Brian Norris 提交于
NAND_BB_LAST_PAGE used to be in nand.h, but it pertained to bad block management and so belongs next to NAND_BBT_SCAN2NDPAGE in bbm.h. Also, its previous flag value (0x00000400) conflicted with NAND_BBT_SCANALLPAGES so I changed its value to 0x00008000. All uses of the name were modified to provide consistency with other "NAND_BBT_*" flags. Signed-off-by: NBrian Norris <norris@broadcom.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Brian Norris 提交于
Included the basic size info for NAND chips with ID of 0xAD or 0xD7. The first can be found in Hynix HY27SF161G2M, while the second can be found in Micron MT29F64G08 and the Samsung K9LBG08U0D (among others). Also, some 64 Gbit (or larger) chips identify as 0xD7 because they contain multiple smaller 32 Gbit chips. I assume it's safe to classify these under the 32 Gbit listing. Signed-off-by: NBrian Norris <norris@broadcom.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Uwe Kleine-König 提交于
This fixes: drivers/mtd/nand/mxc_nand.c: In function 'mxcnd_resume': drivers/mtd/nand/mxc_nand.c:901: warning: unused variable 'host' Removing this variable was missed in 9c14b153. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Karl Beldan 提交于
Signed-off-by: NKarl Beldan <karl.beldan@gmail.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kyle Spaans 提交于
Look for dependency checks for "FOO" when inside of an "if FOO" block and remove them. Signed-off-by: NKyle Spaans <kspaans@uwaterloo.ca> Reviewed-by: NRobert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Sascha Hauer 提交于
The OOB handling in the mxc_nand driver is broken for v1 type controllers (i.MX27/31) with 512 byte page size. This perhaps did not show up because ubi does not use OOB. Update the driver to always read/write a whole page even if only OOB is requested. With this patch the driver passes the mtd_oobtest on i.MX27 with 512 byte page size. Also tested with 2048 byte page size and on i.MX35 (v2 type controller) Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 03 6月, 2010 2 次提交
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由 Anatolij Gustschin 提交于
Fixes build errors in drivers caused by the OF device_node pointer being moved into struct device Signed-off-by: NAnatolij Gustschin <agust@denx.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Maxim Levitsky 提交于
Move MTD_NAND_ECC and MTD_NAND_ECC_SMC above NAND memuconfig, to unbreak display in xconfig. This shouldn't change any dependencies. Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 02 6月, 2010 3 次提交
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由 Maxim Levitsky 提交于
This turns out to be the reason for DMA timeouts on resume, if card was inserted while system was suspended Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Maxim Levitsky 提交于
* Don't call complete on dma completion * do a INIT_COMPLETE before using it each time * Report DMA read error via ecc 'correct' I finally managed to make my system do suspend to ram propertly, and I see that if card was inserted during suspend (while system was off), I get dma timeouts on resume. Simple card reinsert solves the issue. This patch solves a crash that would happen otherwise Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Maxim Levitsky 提交于
Otherwise, if it fires right away, it might access uninitialized spinlock Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 20 5月, 2010 2 次提交
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由 David Woodhouse 提交于
This reverts commit 66803762 ("mtd: mxc_nand: add RESET command support"). Support for NAND_CMD_RESET was added separately in commit d4840180 ("mtd: mxc_nand: set NFC registers after reset"), causing a build error: drivers/mtd/nand/mxc_nand.c: In function 'mxc_nand_command': drivers/mtd/nand/mxc_nand.c:689: error: duplicate case value drivers/mtd/nand/mxc_nand.c:606: error: previously used here Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Tejun Heo 提交于
Implicit slab.h inclusion via percpu.h is about to go away. Make sure gfp.h or slab.h is included as necessary. Signed-off-by: NTejun Heo <tj@kernel.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 14 5月, 2010 8 次提交
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由 Florian Fainelli 提交于
This NAND flash part advertises 0xD1 as an identifier but is still a working 128MBytes x 8bits 3.3V NAND part. Signed-off-by: NFlorian Fainelli <ffainelli@freebox.fr> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kevin Cernekee 提交于
This is a slightly modified version of a patch submitted last year by Reuben Dowle <reuben.dowle@navico.com>. His original comments follow: This patch adds support for some MLC NAND flashes that place the BB marker in the LAST page of the bad block rather than the FIRST page used for SLC NAND and other types of MLC nand. Lifted from Samsung datasheet for K9LG8G08U0A (1Gbyte MLC NAND): " Identifying Initial Invalid Block(s) All device locations are erased(FFh) except locations where the initial invalid block(s) information is written prior to shipping. The initial invalid block(s) status is defined by the 1st byte in the spare area. Samsung makes sure that the last page of every initial invalid block has non-FFh data at the column address of 2,048. ... " As far as I can tell, this is the same for all Samsung MLC nand, and in fact the samsung bsp for the processor used in our project (s3c6410) actually contained a hack similar to this patch but less portable to enable use of their NAND parts. I discovered this problem when trying to use a Micron NAND which does not used this layout - I wish samsung would put their stuff in main-line to avoid this type of problem. Currently this patch causes all MLC nand with manufacturer codes from Samsung and ST(Numonyx) to use this alternative location, since these are the manufactures that I know of that use this layout. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Kevin Cernekee 提交于
Some of the newer MLC devices have a 6-byte ID sequence in which several field definitions differ from older chips in a manner that is not backward compatible. For instance: Samsung K9GAG08U0M (5-byte sequence): ec d5 14 b6 74 4th byte, bits 1:0 encode the page size: 0=1KiB, 1=2KiB, 2=4KiB, 3=8KiB 4th byte, bits 5:4 encode the block size: 0=64KiB, 1=128KiB, ... 4th byte, bit 6 encodes the OOB size: 0=8B/512B, 1=16B/512B Samsung K9GAG08U0D (6-byte sequence): ec d5 94 29 34 41 4th byte, bits 1:0 encode the page size: 0=2KiB, 1=4KiB, 3=8KiB, 4=rsvd 4th byte, bits 7;5:4 encode the block size: 0=128KiB, 1=256KiB, ... 4th byte, bits 6;3:2 encode the OOB size: 1=128B/page, 2=218B/page This patch uses the new 6-byte scheme if the following conditions are all true: 1) The ID code wraps around after exactly 6 bytes 2) Manufacturer is Samsung 3) 6th byte is zero The patch also extends the maximum OOB size from 128B to 256B. Signed-off-by: NKevin Cernekee <cernekee@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ben Dooks 提交于
Add support for a board to register a callback to get the state of the RnB line if it has it attached. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Maxim Levitsky 提交于
2GB xD card, and 4MB SmartMedia ROM card share same ID, so to make both work split xD and smartmedia ID tables. Hardware driver must be able to know which type it handles (and probably just one). Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ivo Clarysse 提交于
On i.MX21 SoCs, if the NFC_CONFIG1:NFC_INT_MASK bit is set, NFC_CONFIG2:NFC_INT always reads out zero, even if an operation is completed. This patch uses enable_irq and disable_irq_nosync instead of NFC_CONFIG1:NFC_INT_MASK to mask NFC interrupts. This allows NFC_CONFIG2:NFC_INT to also be used to detect operation completion on i.MX21. The i.MX21 NFC does not signal reset completion using NFC_CONFIG1:NFC_INT_MASK, so instead reset completion is tested by checking if NFC_CONFIG2 becomes 0. Signed-off-by: NIvo Clarysse <ivo.clarysse@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ivo Clarysse 提交于
This patch allows the mxc_nand driver to reset the NAND flash controller. NFC registers are (re-)set after completion of the reset, as a reset will have reverted the NFC registers to their default values. Signed-off-by: NIvo Clarysse <ivo.clarysse@gmail.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Julia Lawall 提交于
Use kzalloc rather than the combination of kmalloc and memset. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,size,flags; statement S; @@ -x = kmalloc(size,flags); +x = kzalloc(size,flags); if (x == NULL) S -memset(x, 0, size); // </smpl> Signed-off-by: NJulia Lawall <julia@diku.dk> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 13 5月, 2010 2 次提交
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由 David Woodhouse 提交于
drivers/mtd/nand/denali.c:1427: error: conflicting types for ‘enable_dma’ arch/powerpc/include/asm/dma.h:189: note: previous definition of ‘enable_dma’ was here Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Jason Roberts 提交于
There is more work to be done on this but it is basically working now. Signed-off-by: NJason Roberts <jason.e.roberts@intel.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 10 5月, 2010 7 次提交
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由 Steve Deiters 提交于
The revision in SVR for MPC5123 is 3. The NFC is the same as MPC5121 revision 2. Signed-off-by: NSteve Deiters <SteveDeiters@basler.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Marc Kleine-Budde 提交于
The pxa32xx_nand driver doesn't support partition tables from the command line. This patch adds support for it. Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Huang Weiyi 提交于
Remove unused #include <linux/version.h>('s) in drivers/mtd/nand/bcm_umi_nand.c Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com> Acked-by: NLeo Chen <leochen@broadcom.com> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ferenc Wagner 提交于
The original macro worked only when applied to variables named 'mtd'. While this could have been fixed by simply renaming the macro argument, a more type-safe replacement is preferred. Signed-off-by: NFerenc Wagner <wferi@niif.hu> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Mike Frysinger 提交于
Convert all magic numbers into appropriate defines, and move the defines out of the global namespace and into this one driver. No other driver needs to care about the MMR layout anyways. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Ferenc Wagner 提交于
Signed-off-by: NFerenc Wagner <wferi@niif.hu> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Artem Bityutskiy 提交于
We do not need these names. Moreover, there are spelling typos there: "nansin" instead of "nandsim". This patch is just a clean up, no functional changes. Reported-by: NFerenc Wagner <wferi@niif.hu> Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 25 4月, 2010 1 次提交
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由 Paulius Zaleckas 提交于
We must tell GCC to use even register for variable passed to ldrd instruction. Without this patch GCC 4.2.1 puts this variable to r2/r3 on EABI and r3/r4 on OABI, so force it to r2/r3. This does not change anything when EABI and OABI compilation works OK. Without this patch and with OABI I get: CC drivers/mtd/nand/orion_nand.o /tmp/ccMkwOCs.s: Assembler messages: /tmp/ccMkwOCs.s:63: Error: first destination register must be even -- `ldrd r3,[ip]' make[5]: *** [drivers/mtd/nand/orion_nand.o] Error 1 Signed-off-by: NPaulius Zaleckas <paulius.zaleckas@gmail.com> Acked-by: NNicolas Pitre <nico@fluxnic.net> Acked-by: NArtem Bityutskiy <dedekind1@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Jamie Lokier <jamie@shareable.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 26 3月, 2010 1 次提交
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由 Maxim Levitsky 提交于
This way drivers could use ecc routines without depedency on whole nand Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 15 3月, 2010 1 次提交
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由 Magnus Damm 提交于
Update the Kconfig entry for the sh_flctl driver to enable build on SH-Mobile ARM platforms. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 12 3月, 2010 2 次提交
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由 David Woodhouse 提交于
... instead of comparing with DMA_ERROR_CODE, which will only work on powerpc/sparc/x86. Reported-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Randy Dunlap 提交于
r852 fails to build when CONFIG_PCI is not enabled since it uses pci_*() calls and is a PCI driver, so it should depend on PCI to prevent build errors. It should also #include <linux/pci.h>. drivers/mtd/nand/r852.c:1053: error: implicit declaration of function 'pci_prepare_to_sleep' drivers/mtd/nand/r852.c:1062: error: implicit declaration of function 'pci_back_from_sleep' Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com> Cc: Maxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 09 3月, 2010 4 次提交
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由 Stephen Rothwell 提交于
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Stephen Rothwell 提交于
and include delay.h for msleep(). Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Randy Dunlap 提交于
Fix r852 build for the case of CONFIG_PM=n. drivers/mtd/nand/r852.c:1039: error: implicit declaration of function 'pci_prepare_to_sleep' drivers/mtd/nand/r852.c:1048: error: implicit declaration of function 'pci_back_from_sleep' This patch leaves r852_pm_ops untouched. Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com> Acked-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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由 Maxim Levitsky 提交于
First don't enable card detection logic to early. Second be very careful with DMA engine, to be sure it doesn't write to kernel memory driver doesn't own. Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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