1. 20 10月, 2021 1 次提交
  2. 05 10月, 2021 1 次提交
    • D
      drm/i915/pxp: interfaces for using protected objects · d3ac8d42
      Daniele Ceraolo Spurio 提交于
      This api allow user mode to create protected buffers and to mark
      contexts as making use of such objects. Only when using contexts
      marked in such a way is the execution guaranteed to work as expected.
      
      Contexts can only be marked as using protected content at creation time
      (i.e. the parameter is immutable) and they must be both bannable and not
      recoverable. Given that the protected session gets invalidated on
      suspend, contexts created this way hold a runtime pm wakeref until
      they're either destroyed or invalidated.
      
      All protected objects and contexts will be considered invalid when the
      PXP session is destroyed and all new submissions using them will be
      rejected. All intel contexts within the invalidated gem contexts will be
      marked banned. Userspace can detect that an invalidation has occurred via
      the RESET_STATS ioctl, where we report it the same way as a ban due to a
      hang.
      
      v5: squash patches, rebase on proto_ctx, update kerneldoc
      
      v6: rebase on obj create_ext changes
      
      v7: Use session counter to check if an object it valid, hold wakeref in
          context, don't add a new flag to RESET_STATS (Daniel)
      
      v8: don't increase guilty count for contexts banned during pxp
          invalidation (Rodrigo)
      
      v9: better comments, avoid wakeref put race between pxp_inval and
          context_close, add usage examples (Rodrigo)
      
      v10: modify internal set/get-protected-context functions to not
           return -ENODEV when setting PXP param to false or getting param
           when running on pxp-unsupported hw or getting param when i915
           was built with CONFIG_PXP off
      Signed-off-by: NAlan Previn <alan.previn.teres.alexis@intel.com>
      Signed-off-by: NDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Signed-off-by: NBommu Krishnaiah <krishnaiah.bommu@intel.com>
      Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
      Cc: Jason Ekstrand <jason@jlekstrand.net>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210924191452.1539378-11-alan.previn.teres.alexis@intel.com
      d3ac8d42
  3. 01 10月, 2021 1 次提交
    • T
      drm/i915/ttm: Rework object initialization slightly · 068396bb
      Thomas Hellström 提交于
      We may end up in i915_ttm_bo_destroy() in an error path before the
      object is fully initialized. In that case it's not correct to call
      __i915_gem_free_object(), because that function
      a) Assumes the gem object refcount is 0, which it isn't.
      b) frees the placements which are owned by the caller until the
      init_object() region ops returns successfully. Fix this by providing
      a lightweight cleanup function __i915_gem_object_fini() which is also
      called by __i915_gem_free_object().
      
      While doing this, also make sure we call dma_resv_fini() as part of
      ordinary object destruction and not from the RCU callback that frees
      the object. This will help track down bugs where the object is incorrectly
      locked from an RCU lookup.
      
      Finally, make sure the object isn't put on the region list until it's
      either locked or fully initialized in order to block list processing of
      partially initialized objects.
      
      v2:
      - The TTM object backend memory was freed before the gem pages were
        put. Separate this functionality into __i915_gem_object_pages_fini()
        and call it from the TTM delete_mem_notify() callback.
      v3:
      - Include i915_gem_object_free_mmaps() in __i915_gem_object_pages_fini()
        to make sure we don't inadvertedly introduce a race.
      
      Fixes: 48b09612 ("drm/i915: Move __i915_gem_free_object to ttm_bo_destroy")
      Signed-off-by: NThomas Hellström <thomas.hellstrom@linux.intel.com>
      Reviewed-by: Matthew Auld <matthew.auld@intel.com> #v1
      Link: https://patchwork.freedesktop.org/patch/msgid/20210930113236.583531-1-thomas.hellstrom@linux.intel.com
      068396bb
  4. 22 9月, 2021 1 次提交
  5. 28 7月, 2021 1 次提交
  6. 26 7月, 2021 1 次提交
  7. 17 7月, 2021 1 次提交
  8. 09 7月, 2021 1 次提交
  9. 30 6月, 2021 2 次提交
  10. 25 6月, 2021 1 次提交
  11. 17 6月, 2021 2 次提交
  12. 14 6月, 2021 1 次提交
  13. 11 6月, 2021 3 次提交
  14. 06 6月, 2021 1 次提交
  15. 25 3月, 2021 11 次提交
  16. 24 3月, 2021 4 次提交
  17. 02 2月, 2021 1 次提交
  18. 22 1月, 2021 1 次提交
    • I
      drm/i915/gem: Add a helper to read data from a GEM object page · 5fbc2c2b
      Imre Deak 提交于
      Add a simple helper to read data with the CPU from the page of a GEM
      object. Do the read either via a kmap if the object has struct pages
      or an iomap otherwise. This is needed by the next patch, reading a u64
      value from the object (w/o requiring the obj to be mapped to the GPU).
      
      Suggested by Chris.
      
      v2 (Chris):
      - Sanitize the type and order of func params.
      - Avoid consts requiring too many casts.
      - Use BUG_ON instead of WARN_ON, simplify the conditions.
      - Fix __iomem sparse errors.
      - Leave locking/syncing/pinning up to the caller, require only that the
        caller has pinned the object pages.
      - Check for iomem backing store before reading via an iomap.
      v3:
      - Fix offset passed to io_mapping_map_wc() missing a mem.region.start
        delta. (Chris, Matthew)
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Matthew Auld <matthew.william.auld@gmail.com>
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20210120213834.1435710-1-imre.deak@intel.com
      5fbc2c2b
  19. 21 1月, 2021 3 次提交
  20. 20 1月, 2021 2 次提交