Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So a platform_driver for VENC is created and init exit methods are moved from core.c
to its driver probe,remove. pdev member has to be maintained by its own drivers.

Also, venc_vdda_dac reading is moved to venc.c.

VENC platform driver is registered from inside omap_dss_probe, in the order desired.
Signed-off-by: NSenthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: NSumit Semwal <sumit.semwal@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So a platform_driver for DISPC is created and init exit methods are moved from core.c
to its driver probe,remove. pdev member has to be maintained by its own drivers.

DISPC platform driver is registered from inside omap_dss_probe, in the order desired.
Signed-off-by: NSenthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: NSumit Semwal <sumit.semwal@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So a platform_driver for RFBI is created and init exit methods are moved from core.c
to its driver probe,remove. pdev member has to be maintained by its own drivers.

RFBI platform driver is registered from inside omap_dss_probe, in the order desired.
Signed-off-by: NSenthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: NSumit Semwal <sumit.semwal@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

All clock management is moved to dss platform driver. clk_get/put APIs use
dss device instead of core platform device.

Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So the device name is changed from omapdss to omapdss_dss in 2420, 2430,
3xxx clock database files. Now the core driver "omapdss" only takes care
of panel registration with the custom bus.
core driver also uses the clk_enable() / clk_disable() APIs exposed by DSS for
clock management.
DSS driver would do clock management of clocks needed by DISPC, RFBI, DSI, VENC

TODO:  The clock content would be adapted to omap_hwmod in a seperate series.
Signed-off-by: NSenthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: NSumit Semwal <sumit.semwal@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So a platform_driver of DSS is created and init exit methods are moved from core.c
to its driver probe,remove. pdev member has to be maintained by its own drivers.

DSS platform driver is registered from inside omap_dss_probe, in the order desired.
Signed-off-by: NSenthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: NSumit Semwal <sumit.semwal@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Looks up the hwmod database for each of the given DSS HW IP and builds
omap_device which inturn does the platform device register for each of DSS HW IP
Signed-off-by: NSenthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: NSumit Semwal <sumit.semwal@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

As part of omap hwmod changes, DSS will not be the only controller of its
clocks. hwmod initialization also enables the interface clocks, and
manages them.
So, when DSS is built as a module, omap_dss_remove doesn't try to disable
all clocks that have a higher usecount.
Reviewed-by: NKevin Hilman <khilman@ti.com>
Tested-by: NKevin Hilman <khilman@ti.com>
Signed-off-by: NSumit Semwal <sumit.semwal@ti.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Remove extra vdda_dac supply definition. It was a leftover from conflict
resolution.
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Merge branch 'for_2.6.39/pm-misc' of ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus

On the newer ARM processors like CortexA8, CortexA9, the caches can be
speculatively loaded while they are getting flushed.

Clear the SCTLR C bit to prevent further data cache allocation as
part of cache clean routine
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The current code saves few un-necessary registers which are read-only or
write-only, unused CP15 registers.

Remove them and keep only necessary CP15 registers part of
low power context save/restore.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

When L1 cache is suppose to be lost, it needs to be cleaned before
entrering to the low power mode.

While at this, also fix few comments and remove un-necessary
clean_l2 lable.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add necessary barriers after enabling MMU. Also use the sane way to
load pc and jump to it instead of executing ldma first up.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

On ARMv7 dsb, dmb instructions are supported and can be used directly
instead of their cp15 equivalnet. Also remove the opcodes for smc
and use the available instruction directly in OMAP3 low power asm code
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

omap_sr_probe() creates the smartreflex debug directory and its
underlying nvalue debug directory. These directories are removed in
omap_sr_remove().

Basic smartreflex functionality tested on OMAP3630 Zoom3 & OMAP4430 SDP
Signed-off-by: NAnand S Sawant <sawant@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

 * Build unconditionally as ARM for correct interoperation with
   OMAP firmware.

 * Fix an out-of-range ADR when building for ARM.

 * Remove deprecated PC-relative stores.

 * Add the required ENDPROC() directive for each ENTRY().

 * .align before data words.

 * Handle non-interworking return from v7_flush_dcache_all.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NKevin Hilman <khilman@ti.com>

 * Build unconditionally as ARM for correct interoperation with
   OMAP firmware.

 * Remove deprecated PC-relative stores

 * Add the required ENDPROC() directive for each ENTRY().

 * .align before data words
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NJean Pihet <j-pihet@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

For various reasons, Linux now only officially supports being built
with tools which are new enough to understand the SMC instruction.

Replacing the hand-encoded instructions when the mnemonic also
allows for correct assembly in Thumb-2 (otherwise, the result is
random data in the middle of the code).

The Makefile already ensures that this file is built with a high
enough gcc -march= flag (armv7-a).
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: NJean Pihet <j-pihet@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Code marked with ENTRY() also needs a matching ENDPROC() directive,
in order to ensure that the type and instruction set of the
symbol are correctly annotated.

ENDPROC() tags the affected symbol as a function symbol, which will
ensure that link-time fixups don't accidentally switch to the
wrong instruction set.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

For CONFIG_THUMB2_KERNEL, the existing definition of do_wfi() will
insert invalid code into the instruction stream.

Any assembler which can assemble Thumb-2 is guaranteed to accept
the "wfi" mnemonic, so for the Thumb-2 case, just use the mnemonic.

The ARM case is left as-is.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NKevin Hilman <khilman@ti.com>

IVA device is not present in many OMAP3 variants.

This patch ensures that initialization is tied to
the presence of IVA on the device.
Signed-off-by: NSanjeev Premi <premi@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Voltage control on TWL can be done using VMODE/I2C1/I2C_SR.
Since almost all platforms use I2C_SR on omap3, omap3_twl_init by
default expects that OMAP's I2C_SR is plugged in to TWL's I2C
and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected,
the board files are expected to call omap3_twl_set_sr_bit(false) to
ensure that I2C_SR path is not set for voltage control and prevent
the default behavior of omap3_twl_init.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NThara Gopinath <thara@ti.com>
Signed-off-by: NShweta Gulati <shweta.gulati@ti.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NKevin Hilman <khilman@ti.com>

Add a description field to each idle C-state. This helps to give
better data with PowerTop and one don't have to refer to the code
to link what Cx means from system point of view while analysing
PowerTop data.

No functional change.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Remove the custom restore_control_register() and use the exported
set_cr() instead to set the system control register(SCTRL) value.

No functional change.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

The OMAP2 and OMAP3 PM code clears clockdomain wakeup and sleep
dependencies.  This is unnecessary after commit
6f7f63cc ("OMAP clockdomain:
initialize clockdomain registers when the clockdomain layer starts")
which clears these dependencies during clockdomain init.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Now that omap_hwmod + omap_device is used for OMAP UART device and
driver code, we no longer need the UART physical addresses in
omap_globals.

Note that the #defines for the base addresses are still left in
<plat/serial.h> since they are used by DEBUG_LL and uncompress code.

Build tested for OMAP1 (omap1_defconfig) and OMAP2+ (omap2plus_defconfig)
Signed-off-by: NKevin Hilman <khilman@ti.com>

kzalloc() may fail, if so return -ENOMEM.  Also Walter Harms suggested
to use kasprintf() instead of kzalloc+strcpy+strcat.
Signed-off-by: NVasiliy Kulikov <segoon@openwall.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

OMP3630 silicon can enable higher frequencies only depending on the board
characteristics meeting the recommended standards, and has to be selectively
toggled.

Beagle XM uses 3730 variant and the board design allows enabling 800MHz and
1GHz OPPs. However, We need Smart reflex class 1.5 and ABB to enable 1GHz
safely.  For the moment, we tweak the default table to allow for 800Mhz OPP
usage.
Reported-by: NKoen Kooi <koen@beagleboard.org>
Tested-by: NKoen Kooi <koen@beagleboard.org>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

omap3 and omap4 opp_init should be made non-static to allow
for platform specific opp table tweaking. making these static
conflicts with the definition in pm.h(global) as well.
we include pm.h as well to ensure that there are no such prototype
conflicts with actual implementation in the future.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

In case in user has a OMAP3630 < ES1.2 the kernel should warn the user
about the ERRATUM, but using pr_warn instead of WARN_ON is already
enough, as there is nothing else the user can do besides changing the
board.
Signed-off-by: NRicardo Salveti de Araujo <ricardo.salveti@canonical.com>
Signed-off-by: NKevin Hilman <khilman@ti.com>

Change my email to TI email address for OMAP PM maintenance.
Signed-off-by: NKevin Hilman <khilman@ti.com>

Merge branch 'omap-l3-for-next' of git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into omap-for-linus

According to the hwmod interface data, the DSS submodule "VENC" uses a
clock, "dss_54m_fck"/"dss_tv_fck", which the PRCM cannot autoidle.  By
default, the hwmod code assumes that interface clocks can be autoidled
by the PRCM.  When the interface clock can't be autoidled by the PRCM,
those interfaces must be marked with the OCPIF_SWSUP_IDLE flag.
Otherwise, the "interface clock" will always have a non-zero use
count, and the device won't enter idle.  This problem was observed on
N8x0.

Fix the immediate problem by marking the VENC interface with the
OCPIF_SWSUP_IDLE flag.  But it's not clear that
"dss_54m_fck"/"dss_tv_fck" is really the correct interface clock for
VENC.  It may be that the VENC interface should use a
hardware-autoidling interface clock.  This is the situation on OMAP4,
which uses "l3_div_ck" as the VENC interface clock, which can be
autoidled by the PRCM.  Clarification from TI is needed.

Problem found and patch tested on N8x0 by Tony Lindgren
<tony@atomide.com>.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Senthilvadivu Guruswamy <svadivu@ti.com>
Cc: Sumit Semwal <sumit.semwal@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The driver provides the information regarding the ocp errors
that gets logged in the interconnect. The error information
gives the detail regarding the target that was attempted
to be accessed and its corresponding address.
Signed-off-by: Nsricharan <r.sricharan@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NBenoit Cousson <b-cousson@ti.com>

The l3 interconnect device is build with all the data required
to handle the error logging. The data is extracted from the
hwmod data base.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Nsricharan <r.sricharan@ti.com>
Acked-by: NBenoit Cousson <b-cousson@ti.com>

Add the address spaces, irqs of the l3 interconnect to the
hwmod data. The hwmod change is aligned with Benoit Cousson.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Nsricharan <r.sricharan@ti.com>
Acked-by: NBenoit Cousson <b-cousson@ti.com>

The driver provides the information regarding the ocp errors
that gets logged in the interconnect.The error info provides
the details regarding the master or the target that
generated the error, type of error and the corresponding address.
The stack dump is also provided.
Signed-off-by: Nsricharan <r.sricharan@ti.com>
[r.sricharan@ti.com: Enhacements, major cleanup and made it functional]
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
[santosh.shilimkar@ti.com: Driver design changes as per OMAP4 version]
Signed-off-by: NFelipe Balbi <balbi@ti.com>
[balbi@ti.com: Initial version of the driver]
Acked-by: NBenoit Cousson <b-cousson@ti.com>

The l3 interconnect device is build with all the data required
to handle the error logging. The data is extracted from the
hwmod database.
Signed-off-by: Nsricharan <r.sricharan@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NBenoit Cousson <b-cousson@ti.com>

Add the address spaces, irqs of the l3 interconnect to the
hwmod data. The hwmod changes are aligned with Benoit Cousson.
Signed-off-by: Nsricharan <r.sricharan@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: NBenoit Cousson <b-cousson@ti.com>

The i2c_board_info entry supporting AIC23 codec was added into
the i2c2 bus.
Signed-off-by: NAbhilash K V <abhilash.kv@ti.com>
Acked-by: NJarkko Nikula <jhnikula@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>