- 06 2月, 2015 2 次提交
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由 Nicholas Mc Guire 提交于
return type of wait_for_completion_timeout is unsigned long not int, this patch uses the return value of wait_for_completion_timeout in the condition directly rather than adding a additional appropriately typed variable. Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Nicholas Mc Guire 提交于
return type of wait_for_completion_timeout is unsigned long not int, this patch uses the return value of wait_for_completion_timeout in the condition directly rather than assigning it to an incorrect type variable. Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 05 2月, 2015 4 次提交
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由 Nicholas Mc Guire 提交于
return type of wait_for_completion_timeout is unsigned long not int and always returns >=0 , this patch adds a suitable return variable and simplifies the return value checking as there is no < 0 case. Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Nicholas Mc Guire 提交于
return type of wait_for_completion_timeout is unsigned long not int, this patch uses the return value of wait_for_completion_timeout in the condition directly rather than assigning it to an incorrect type variable. Signed-off-by: NNicholas Mc Guire <der.herr@hofr.at> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Nicholas Mc Guire 提交于
return type of wait_for_completion_timeout is unsigned long not int, this patch changes the type of m from int to unsigned long. Signed-off-by: NNicholas Mc Guire <der.herr@hofr.at> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Rob Herring 提交于
Move the include of mach/dma.h to the legacy PXA DMA code where it is used. This enables building spi-pxa2xx on ARM64. Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 04 2月, 2015 1 次提交
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由 Nicholas Mc Guire 提交于
return type of wait_for_completion_timeout is unsigned long not int, this patch adds an appropriate variable and fixes up the assignment. It removes the else branch as the only thing it was doing is assigning ret = 0; - but ret is never used thereafter so that is not needed. As the string in dev_err already states "timeout" there is little point in printing the 0. A typo in "trasfer" -> transfer is also fixed. Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 03 2月, 2015 4 次提交
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由 Robin Gong 提交于
For TKT238285 hardware issue which may cause txfifo store data twice can only be caught on i.mx6dl, we use pio mode instead of DMA mode on i.mx6dl. Fixes: f62caccd (spi: spi-imx: add DMA support) Signed-off-by: NRobin Gong <b38343@freescale.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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由 Bhuvanchandra DV 提交于
Move the check for spi->bits_per_word before allocation, to avoid memory leak. Reported-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Nobuhiro Iwamatsu 提交于
sh-msiof of frequency dividing does not perform the calculation, driver have to manage setting value in the table. It is not possible to set frequency dividing value close to the actual data in this way. This changes from frequency dividing of table management to setting by calculation. This driver is able to set a value close to the actual data. Signed-off-by: NNobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Ian Abbott 提交于
The SPI_IOC_MESSAGE(n) ioctl commands' argument points to an array of n struct spi_ioc_transfer elements. The spidev's compat_ioctl handler just converts this pointer and passes it on to the unlocked_ioctl handler to process it. The tx_buf and rx_buf members of struct spi_ioc_transfer are of type __u64 and hold pointer values. A 32-bit userspace application running in a 64-bit kernel might not have widened the 32-bit pointers correctly for the kernel. The application might have sign-extended the pointer to when the kernel expects it to be zero-extended, or vice versa, leading to an -EFAULT being returned by spidev_message() if the widened pointer is invalid. Handle the SPI_IOC_MESSAGE(n) ioctl commands specially in the compat_ioctl handler, calling new function spidev_compat_ioctl_message() to handle them. This processes them in the same way as the unlocked_ioctl handler except that it uses compat_ptr() to convert the tx_buf and rx_buf members of each struct spi_ioc_transfer element. To save code, factor out part of the unlocked_ioctl handler into a new function spidev_get_ioc_message(). This checks the ioctl command code is a valid SPI_IOC_MESSAGE(n), determines n and copies the array of n struct spi_ioc_transfer elements from userspace into dynamically allocated memory, returning either a pointer to the memory, an ERR_PTR(-err) value, or NULL (for SPI_IOC_MESSAGE(0)). Signed-off-by: NIan Abbott <abbotti@mev.co.uk> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 29 1月, 2015 3 次提交
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由 Chao Fu 提交于
DSPI module need cs change information in a spi transfer. According to cs change, DSPI will give last data the right flag. Bitbang provide cs change behind the last data in a transfer. So DSPI can not deal the last data in every transfer properly, so remove the bitbang in the driver. Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Arnd Bergmann 提交于
The pl08x driver originally selected S3C64XX_PL080 to avoid having the legacy Samsung DMA interfaces. Those are now gone, so the select is no longer needed, but it now causes problems when CONFIG_DMA_ENGINE is disabled: arch/arm/plat-samsung/built-in.o: In function `s3c64xx_spi0_set_platdata': :(.init.text+0x518): undefined reference to `pl08x_filter_id' This simply removes the 'select' to avoid this problem. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Arnd Bergmann 提交于
We currently get a warning about potentially uninitialized variables in the rockchip spi driver, at least in certain toolchain versions: spi/spi-rockchip.c: In function 'rockchip_spi_prepare_dma': include/linux/dmaengine.h:796:2: warning: 'txdesc' may be used uninitialized in this function include/linux/dmaengine.h:796:2: warning: 'rxdesc' may be used uninitialized in this function The reason seems to be that gcc cannot know whether the value of the rs->rx and rs->tx variables change between the two points these are accessed. The code is actually correct, but to make this clearer to the compiler, this changes the conditionals to test for the local rxdesc/txdesc variables instead, which it knows won't change. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 28 1月, 2015 2 次提交
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由 Jarkko Nikula 提交于
Commit 7566bcc7 ("spi: pxa2xx: Move is_lpss_ssp() tests to caller") did not check LPSS before calling lpss_ssp_setup() in pxa2xx_spi_resume(). Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Bhuvanchandra DV 提交于
devm_* API was supposed to be used only in probe function call. Memory is allocated at 'probe' and free automatically at 'remove'. Usage of devm_* functions outside probe sometimes leads to memory leak. Avoid using devm_kzalloc in dspi_setup_transfer and use kzalloc instead. Also add the dspi_cleanup function to free the controller data upon cleanup. Acked-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NBhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 27 1月, 2015 1 次提交
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由 Andy Shevchenko 提交于
The clock information is being kept in the custom register on Intel MID platforms. Each controller has its own dedicated custom register for that. Thus, to get a proper frequency we have to read value from the specific offset to the register block. This patch makes this happen. Fixes: d58cf5ff (spi: dw-pci: describe Intel MID controllers better) Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 17 1月, 2015 1 次提交
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由 Michal Simek 提交于
Trivial fix. Signed-off-by: NMichal Simek <michal.simek@xilinx.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 16 1月, 2015 1 次提交
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由 Ken Wilson 提交于
This commit adds support for multiple hardware chip selects to spi-orion. Different SoCs support different number of chip selects (up to 8 on some platforms). The driver allows up to this number, and it is up to the implementer to only use the chip selects that are available. Signed-off-by: NKen Wilson <ken.wilson@opengear.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 15 1月, 2015 2 次提交
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由 Axel Lin 提交于
spi_setup() will test unsupported mode bits before calling spi->master->setup. Thus remove duplicate code to test unsupported mode bits in spi_st_setup(). Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Ken Wilson 提交于
This commit changes spi-orion to provide setup, set_cs, and transfer_one functions instead of transfer_one_message. This allows chip select support for both native and GPIO chip selects to be added. Signed-off-by: NKen Wilson <ken.wilson@opengear.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 08 1月, 2015 4 次提交
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由 Andy Shevchenko 提交于
There are more that one SPI controller on the Intel MID boards. This patch describes the status and IDs of them. From now on we also have to care about bus number that must be unique per host. According to the specification the SPI1 has 5 bits for chip selects and SPI2 only 2 bits. The patch makes it depend to PCI ID. The first controller (SPI1) is DMA capable, meanwhile SPI2 can share same channels (via software switch) such functionality is not in the scope of this patch. Thus, attempt to init DMA for SPI2 will always fail for now. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Andy Shevchenko 提交于
When autodetection is used it would be useful to know what the FIFO size is. The patch adds a debug message for this purpose. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Andy Shevchenko 提交于
In case of warning message in ->probe() we have to use HW device name instead of master because last is not defined yet. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Geert Uytterhoeven 提交于
There's no need to use the synchronous version. Reported-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 07 1月, 2015 3 次提交
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由 Barry Song 提交于
"sirf,marco-spi" is redundant as all SPI controllers in CSR SiRFSoC are compatible with prima2-spi. at the same time, the whole marco project was dropped and its replacement atlas7 is also compatible with prima2 in SPI. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Esben Haabendal 提交于
Signed-off-by: NEsben Haabendal <eha@deif.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Laurentiu Palcu 提交于
This fixes the following kbuild test robot warnings: >> drivers/spi/spi-dln2.c:124:1-4: WARNING: end returns can be simplified if negative or 0 value >> drivers/spi/spi-dln2.c:656:1-4: WARNING: end returns can be simplified if negative or 0 value Additionally, fix a comment after switching from CONFIG_PM_RUNTIME to CONFIG_PM. Reported-by: NJulia Lawall <julia.lawall@lip6.fr> Signed-off-by: NLaurentiu Palcu <laurentiu.palcu@intel.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 06 1月, 2015 5 次提交
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由 Yoshihiro Shimoda 提交于
Since the FLD bit field is bit[3:2], the MDR1_FLD_MASK value should be 0x0000000c. Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Andy Shevchenko 提交于
The FIFO size is 40 accordingly to the specifications, but this means 0x40, i.e. 64 bytes. This patch fixes the typo and enables FIFO size autodetection for Intel MID devices. Fixes: 7063c0d9 (spi/dw_spi: add DMA support) Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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由 Krzysztof Kozlowski 提交于
The regmap_config struct may be const because it is not modified by the driver and regmap_init() accepts pointer to const. Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Axel Lin 提交于
Current code tries to find the highest valid fifo depth by checking the value it wrote to DW_SPI_TXFLTR. There are a few problems in current code: 1) There is an off-by-one in dws->fifo_len setting because it assumes the latest register write fails so the latest valid value should be fifo - 1. 2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary to test fifo == 257. In the case fifo is 257, it means the latest valid setting is fifo = 256. So after the for loop iteration, we should check fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails. This patch fixes above issues. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Reviewed-and-tested-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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由 Nizam Haider 提交于
fixed a coding style issue Signed-off-by: NNizam Haider <nizamhaider786@gmail.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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- 30 12月, 2014 3 次提交
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由 Fabio Estevam 提交于
The irq number is only used inside the probe function, so there is really no need to store it in the private structure. Use a local 'irq' variable to hold the the irq number instead. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Ivan T. Ivanov 提交于
Device support SPI_CPOL, but driver have missed to add support for this configuration. Signed-off-by: NIvan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Mika Westerberg 提交于
Once the current message is finished, the driver notifies SPI core about this by calling spi_finalize_current_message(). This function queues next message to be transferred. If there are more messages in the queue, it is possible that the driver is asked to transfer the next message at this point. When spi_finalize_current_message() returns the driver clears the drv_data->cur_chip pointer to NULL. The problem is that if the driver already started the next message clearing drv_data->cur_chip will cause NULL pointer dereference which crashes the kernel like: BUG: unable to handle kernel NULL pointer dereference at 0000000000000048 IP: [<ffffffffa0022bc8>] cs_deassert+0x18/0x70 [spi_pxa2xx_platform] PGD 78bb8067 PUD 37712067 PMD 0 Oops: 0000 [#1] SMP Modules linked in: CPU: 1 PID: 11 Comm: ksoftirqd/1 Tainted: G O 3.18.0-rc4-mjo #5 Hardware name: Intel Corp. VALLEYVIEW B3 PLATFORM/NOTEBOOK, BIOS MNW2CRB1.X64.0071.R30.1408131301 08/13/2014 task: ffff880077f9f290 ti: ffff88007a820000 task.ti: ffff88007a820000 RIP: 0010:[<ffffffffa0022bc8>] [<ffffffffa0022bc8>] cs_deassert+0x18/0x70 [spi_pxa2xx_platform] RSP: 0018:ffff88007a823d08 EFLAGS: 00010202 RAX: 0000000000000008 RBX: ffff8800379a4430 RCX: 0000000000000026 RDX: 0000000000000000 RSI: 0000000000000246 RDI: ffff8800379a4430 RBP: ffff88007a823d18 R08: 00000000ffffffff R09: 000000007a9bc65a R10: 000000000000028f R11: 0000000000000005 R12: ffff880070123e98 R13: ffff880070123de8 R14: 0000000000000100 R15: ffffc90004888000 FS: 0000000000000000(0000) GS:ffff880079a80000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: 0000000000000048 CR3: 000000007029b000 CR4: 00000000001007e0 Stack: ffff88007a823d58 ffff8800379a4430 ffff88007a823d48 ffffffffa0022c89 0000000000000000 ffff8800379a4430 0000000000000000 0000000000000006 ffff88007a823da8 ffffffffa0023be0 ffff88007a823dd8 ffffffff81076204 Call Trace: [<ffffffffa0022c89>] giveback+0x69/0xa0 [spi_pxa2xx_platform] [<ffffffffa0023be0>] pump_transfers+0x710/0x740 [spi_pxa2xx_platform] [<ffffffff81076204>] ? pick_next_task_fair+0x744/0x830 [<ffffffff81049679>] tasklet_action+0xa9/0xe0 [<ffffffff81049a0e>] __do_softirq+0xee/0x280 [<ffffffff81049bc0>] run_ksoftirqd+0x20/0x40 [<ffffffff810646df>] smpboot_thread_fn+0xff/0x1b0 [<ffffffff810645e0>] ? SyS_setgroups+0x150/0x150 [<ffffffff81060f9d>] kthread+0xcd/0xf0 [<ffffffff81060ed0>] ? kthread_create_on_node+0x180/0x180 [<ffffffff8187a82c>] ret_from_fork+0x7c/0xb0 Fix this by clearing drv_data->cur_chip before we call spi_finalize_current_message(). Reported-by: NMartin Oldfield <m@mjoldfield.com> Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
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- 24 12月, 2014 4 次提交
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由 Yoshihiro Shimoda 提交于
The MSIOF controller has DTDL and SYNCDL in SITMDR1 register. So, this patch adds new properties like the following commit: d0fb47a5 (spi: fsl-espi: Configure FSL eSPI CSBEF and CSAFT) Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Andrew Bresticker 提交于
Since the 32-bit FIFO is deeper (64 bytes) than the 8-bit FIFO (16 bytes), use the 32-bit FIFO when there are at least 32 bits remaining to be transferred in PIO mode or when the transfer length is 32-bit aligned in DMA mode. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Andrew Bresticker 提交于
A 1-byte burst size is rather inefficient and has been shown to cause TX issues during testing. Increase the DMA burst size to 4-bytes for both RX and TX DMA when using the 8-bit FIFO. Signed-off-by: NAndrew Bresticker <abrestic@chromium.org> Signed-off-by: NMark Brown <broonie@kernel.org>
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由 Nicholas Mc Guire 提交于
The double call to init_completion(&mpc8xxx_spi->done); is not needed presumably this is a editing mistake only. Signed-off-by: NNicholas Mc Guire <der.herr@hofr.at> Signed-off-by: NMark Brown <broonie@kernel.org>
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