In order to avoid code duplication, let's consolidate the ECC setting
for all SoC variants. Such decision is based on page size and ECC
strength requirements.

Also, provide a default value for the case where such ECC information
is not provided (non-ONFI devices).
Tested-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Currently, we have two different cmdfunc's implementations:
one for PXA3xx SoC variant and one for Armada 370/XP SoC variant.

The former is the legacy one, typically constrained to devices
with page sizes smaller or equal to the controller's FIFO buffer.
On the other side, the latter _only_ supports the so-called extended
command semantics, which allow to handle devices with larger
page sizes (4 KiB, 8 KiB, ...).

This means we currently don't support devices with smaller pages on the
A370/XP SoC. Fix it by first renaming the cmdfuncs variants, and then
make the choice based on device page size (and SoC variant), rather than
SoC variant alone.

While at it, add a check for page size, to make sure we don't allow larger
pages sizes on the PXA3xx variant.
Tested-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Currently the driver assumes all commands will eventually trigger a RnB
transition, and thus a "device is ready" IRQ.

This assumption means that on every issued command, the dev_ready completion
handler is init'ed and the need_wait flag is set.

However this is incorrect: some commands (such as NAND_CMD_STATUS) don't
make the device 'busy' and thus a RnB transition never occurs.
Given, the NAND core never calls waitfunc() after such commands, this
is not a problem.

Therefore, it's possible to only clear the need_wait flag on every command
that is started.

This fixes a current bug that can be reproduced on PXA boards by writing
blank (all 0xff'ed) to a page:

  1. The kernel issues NAND_CMD_STATUS and sets need_wait=1. The flag
     won't be cleared for this command since no RnB transition is
     involved.

  2. NAND_CMD_PAGEPROG is issued but since the data is blank, the driver
     decides not to execute the command (and no IRQ activity is
     involved).

  3. The NAND core calls waitfunc() and waits for the dev_ready
     completion, which will never end since the device _is_ already ready.
Tested-by: NArnaud Ebalard <arno@natisbad.org>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This patch marks the function is_erased() as static in denali.c because
it is not used outside this file.

This patch elimiates the following warning in nand/denali.c:
drivers/mtd/nand/denali.c:900:6: warning: no previous prototype for ‘is_erased’ [-Wmissing-prototypes]
Signed-off-by: NRashika Kheria <rashika.kheria@gmail.com>
Reviewed-by: NJosh Triplett <josh@joshtriplett.org>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This driver doesn't need its own custom chip->write_page callback; the
only "custom" requirement is that this driver does not support subpage
writes, which we can avoid using the NAND_NO_SUBPAGE_WRITE flag. With
NAND_NO_SUBPAGE_WRITE, the default routine (nand_write_page()) should
perform the equivalent operations.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Acked-by: NRoland Stigge <stigge@antcom.de>
Tested-by: NRoland Stigge <stigge@antcom.de>

The TI AEMIF driver registers are used to setup timings for each chip
select. The same registers range is used to setup NAND settings.
The AEMIF and NAND drivers not use the same registers in this range.

In case with TI AEMIF driver, the memory address range is requested
already by AEMIF, so we cannot request it twice, just ioremap.
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NTaras Kondratiuk <taras@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The Keystone arch has compatible nand device, so reuse it.
In case with Keystone it depends on TI_AEMIF because AEMIF
driver is responsible to set timings.

See http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdfReviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NTaras Kondratiuk <taras@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The properties davinci-ecc-mode, davinci-nand-use-bbt, davinci-nand-buswidth
are MTD generic. Correct names for them are: nand-ecc-mode, nand-on-flash-bbt,
nand-bus-width accordingly. So rename them in dts and documentation.
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NTaras Kondratiuk <taras@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

There is not needed to use a lot of names for err handling.
It complicates code support and reading.
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NTaras Kondratiuk <taras@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The property "ti,davinci-chipselect" is required. So we have to check
if it is set.
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NTaras Kondratiuk <taras@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

In case when memory allocation is failed the driver should return
ENOMEM instead of ENODEV.
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NTaras Kondratiuk <taras@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

When kernel is booted using DT, there is no guarantee that Davinci
NAND device has been created already at the time when driver init
function is executed. Therefore, platform_driver_probe() can't be used
because this may result the Davinci NAND driver will never be probed.
The driver probing has to be made with core mechanism.
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: NTaras Kondratiuk <taras@ti.com>
Signed-off-by: NIvan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Add missing platform_set_drvdata() in au1550nd_probe(), otherwise
calling platform_get_drvdata() in remove returns NULL.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

clock source is prepared and enabled by clk_prepare_enable() in
mxcnd_probe() function, but no disable/unprepare in mxcnd_remove().
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Since the of_mtd header provides dummy stubs for !CONFIG_OF, it's safe
to remove the #ifdef CONFIG_OF. Build tested only.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Don't use DEFINE_PCI_DEVICE_TABLE macro, because this macro
is not preferred.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This simplifies error and cleanup code paths.

Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Cast pointers to uintptr_t instead of unsigned int. This fixes warnings
on platforms where pointers have a different size than int.

Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This helps increasing build testing coverage.

Cc: David Woodhouse <dwmw2@infradead.org>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NSimon Horman <horms@verge.net.au>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Add a nice "nand:" prefix to all pr_xxx() messages. This allows
to get rid of the "NAND" words in messages, given the context
is already given by the prefix.

Remove the __func__ report from messages where it's not needed and refactor
the device detection messages to show itself in several lines.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

clk_prepare_enable() may fail, so let's check its return value and propagate it
in the case of error.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The ecc_stats.corrected count variable will already be incremented in
the above framework-layer just after this callback.

Cc: stable@vger.kernel.org # 2.6.36+
Signed-off-by: NMichael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The devm_request_irq function allocates irq that is released
when a driver detaches. Thus, there is no reason to explicitly
call devm_free_irq in probe or remove functions.
Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

change all the pr_debug to dev_dbg.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

There are pr_err and dev_err in the gpmi driver now.
It makes people confused.

This patch changes all the pr_err to dev_err except the one
in the gpmi_reset_block(). We also remove the unnecessary
print for OOM message.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The error messages for the failure of dmaengine_prep_slave_sg are
not necessary, this patch removes all these pr_err, and returns with
the proper error code -EINVAL, not -1.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This patch adds request_mem_region() prior ioremap() for diskonchip
driver. This will allow to check if memory region is occupied by any
other device, for example in case if we have memory region for several
optional devices and only one device can be used at once.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Use devm_request_irq to simplify the code.
Also remove the unused fields of structure resources{}.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Use the devm_ioremap_resource to simplify the code.

[Note: as a side effect, this adds a missing call to request_memory().]
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The gpmi_nfc_* is the legacy name. In order to avoid the confusion,
The patch renames the gpmi_nfc_* functions to gpmi_nand_*.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

We do not use the chip->oob_poi in the mx23_write_transcription_stamp.
So remove the unused line.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

We do not scan the BBT after we call the gpmi_pre_bbt_scan,
so it has lost the meaning of existence.

This patch merges this function into gpmi_init_last, and delete it.
This patch does not change any logic.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The local array feature[] is in the stack. We can see the warning
when we enable the CONFIG_DMA_API_DEBUG:
----------------------------------------------------------
WARNING: at lib/dma-debug.c:950 check_for_stack+0xac/0xf8()
gpmi-nand 112000.gpmi-nand: DMA-API: device driver maps memory fromstack [addr=dc05be34]
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.17-16851-g2414a73 #1324
[<80014cbc>] (unwind_backtrace+0x0/0x138) from [<8001251c>] (show_stack+0x10/0x14)
[<8001251c>] (show_stack+0x10/0x14) from [<8002699c>] (warn_slowpath_common+0x4c/0x68)
[<8002699c>] (warn_slowpath_common+0x4c/0x68) from [<80026a4c>] (warn_slowpath_fmt+0x30/0x40)
[<80026a4c>] (warn_slowpath_fmt+0x30/0x40) from [<8028e2f8>] (check_for_stack+0xac/0xf8)
[<8028e2f8>] (check_for_stack+0xac/0xf8) from [<8028e438>] (debug_dma_map_sg+0xf4/0x188)
[<8028e438>] (debug_dma_map_sg+0xf4/0x188) from [<803968d0>] (prepare_data_dma+0xb8/0x1a8)
[<803968d0>] (prepare_data_dma+0xb8/0x1a8) from [<80397b20>] (gpmi_send_data+0x84/0xfc)
[<80397b20>] (gpmi_send_data+0x84/0xfc) from [<8038c2b4>] (nand_onfi_set_features+0x50/0x74)
[<8038c2b4>] (nand_onfi_set_features+0x50/0x74) from [<80397198>] (gpmi_extra_init+0x90/0x170)
[<80397198>] (gpmi_extra_init+0x90/0x170) from [<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c)
[<8039520c>] (gpmi_nand_probe+0x2f8/0xb3c) from [<8031b974>] (platform_drv_probe+0x18/0x1c)
----------------------------------------------------------

The patch uses the kzalloc to allocate the buffer, and free it when
we do not use it anymore.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The Armada BCH configuration in this driver uses one of the two
following ECC schemes:

 16-bit correction per 2048 bytes
 16-bit correction per 1024 bytes

These are sufficient for mapping to the 4-bit per 512-bytes and 8-bit
per 512-bytes (respectively) minimum correctability requirements of many
common NAND.

The current code only checks for the required strength (4-bit or 8-bit)
without checking the ECC step size that is associated with that strength
(and simply assumes it is 512). While that is often a safe assumption to
make, let's make it explicit, since we have that information.
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
Acked-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>

This commit extends the ECC correctable error detection to include
ECC BCH errors. The number of BCH correctable errors can be any up to 16,
and the actual value is exposed in the NDSR register.

Therefore, we change some symbol names to refer to correctable or
uncorrectable (instead of single-bit or double-bit as it was in the
Hamming case) and while at it, cleanup the detection code slightly.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This commit adds write support for large pages (4 KiB, 8 KiB).
Such support is implemented by issuing a multiple command sequence,
transfering a set of 2 KiB chunks per transaction.

The splitted command sequence requires to send the SEQIN command
independently of the PAGEPROG command and therefore it's set as
an execution command.

Since PAGEPROG enables ECC, each 2 KiB chunk of data is written
together with ECC code at a controller-fixed location within
the flash page.

Currently, only devices with a 4 KiB page size has been tested.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

As preparation work to fully support large pages, this commit adds
the initial infrastructure to support splitted (aka chunked) I/O
operation. This commit adds support for read, and follow-up patches
will add write support.

When a read (aka READ0) command is issued, the driver loops issuing
the same command until all the requested data is transfered, changing
the 'extended' command field as needed.

For instance, if the driver is required to read a 4 KiB page, using a
chunk size of 2 KiB, the transaction is splitted in:
1. Monolithic read, first 2 KiB page chunk is read
2. Last naked read, second and last 2KiB page chunk is read

If ECC is enabled it is calculated on each chunk transfered and added
at a controller-fixed location after the data chunk that must be
spare area.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

In preparation to support multiple (aka chunked, aka splitted)
page I/O, this commit adds 'data_buff_pos' and 'oob_buff_pos' fields
to keep track of where the next read (or write) should be done.

This will allow multiple calls to handle_data_pio() to continue
the read (or write) operation.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This commit adds support page programming with a non-zero "column"
address setting. This is important to support OOB writing, through
command sequences such as:

  cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, ofs);
  write_buf(mtd, oob_buf, 6);
  cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

To allow future support of multiple page reading/writing, move the data
buffer clean out of prepare_set_command().

This is done to prevent the data buffer from being cleaned on every command
preparation, when a multiple command sequence is implemented to read/write
pages larger than the FIFO size (2 KiB).
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>