8devices Jalapeno is a dual-band SoM, based on Qualcomm
IPQ4018 + QCA8072 platform.

Specification:
QCA IPQ4018, Quad core ARM v7 Cortex A7 717MHz
256 MB of DDR3 RAM
8 MB of SPI NOR flash
128 MB of Winbond SPI NAND flash
WLAN1: Qualcomm Atheros QCA4018 2.4GHz 802.11bgn 2:2x2
WLAN2: Qualcomm Atheros QCA4018 5GHz 802.11a/n/ac 2:2x2
ETH: Qualcomm Atheros QCA8072 Gigabit Switch (1 x LAN, 1 x WAN)
Signed-off-by: NRobert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-3-robert.marko@sartura.hrSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Lets add labels to more commonly used nodes for easier modification in board DTS files.
Signed-off-by: NRobert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Link: https://lore.kernel.org/r/20200909195640.3127341-2-robert.marko@sartura.hrSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Since we now have driver for the USB PHY, and USB controller is already supported by the DWC3 driver lets add the necessary nodes to DTSI.
Signed-off-by: NJohn Crispin <john@phrozen.org>
Signed-off-by: NRobert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20200909163831.1894142-1-robert.marko@sartura.hrSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add missing prng definition for ipq806x SoC
Signed-off-by: NJonathan McDowell <noodles@earth.li>
Link: https://lore.kernel.org/r/20200705142544.GA3389@earth.liSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add support for pshold block to drive pshold towards the PMIC, which is
used to trigger a configurable event such as reboot or poweroff of the
SDX55 platform.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-7-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Enable Watchdog support for Application Processor Subsystem (APSS) block
on SDX55 platform.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-6-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add devicetree binding for watchdog present in Qcom SDX55 platform.

Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-5-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Enable the support for USB3 controller, QMP PHY and HS PHY on SDX55 MTP.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-4-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on SDX55.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-3-manivannan.sadhasivam@linaro.org
[bjorn: Added missing #power-domain-cells to &gcc]
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add devicetree binding for SDX55 USB controller based on Qcom designware
IP.
Acked-by: NFelipe Balbi <balbi@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210118051005.55958-2-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Since commit fa2d0aa9 ("mmc: core: Allow setting slot index
via device tree alias") proper aliases should be named "mmcN".
Signed-off-by: NAlexey Minnekhanov <alexeymin@postmarketos.org>
Link: https://lore.kernel.org/r/20210110185835.133059-1-alexeymin@postmarketos.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This adds the regulators found on SDX55 MTP.
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-19-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

SDX55-mtp features PMX55 pmic, so include the dts as well
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-16-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This adds DTS for PMIC PMX55 found in Qualcomm platforms.
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-18-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This adds rpmpd node and opps for this node to the SDX55 dts.
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-17-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

SDX55-mtp features PM8150B pmic, so include the dts as well
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-15-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This adds SPMI node to SDX55 dts.
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-14-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Enable QPIC NAND on SDX55-MTP board.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-13-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Enable BAM DMA on SDX55-MTP board.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-12-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add qpic_nand node to support QPIC NAND controller on SDX55 platform.
Since there is no "aon" clock in SDX55, a dummy clock is provided.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-11-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add qpic_bam node to support QPIC BAM DMA controller on SDX55 platform.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-10-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add smem node to support shared memory manager on SDX55 platform.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: NVinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210106125322.61840-9-manivannan.sadhasivam@linaro.org
[bjorn: Moved smem node out from /soc]
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add TCSR Mutex node to support Qualcomm Hardware Mutex block on SDX55
platform.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-8-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add a node for the ARM SMMU found in the SDX55.
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-7-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add devicetree support for SDHCI controller found in Qualcomm SDX55
platform. The SDHCI controller is based on the MSM SDHCI v5 IP.
Hence, the support is added by reusing the existing sdhci driver with
"qcom,sdhci-msm-v5" as the fallback.
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-5-manivannan.sadhasivam@linaro.org
[bjorn: added include of qcom,gcc-sdx55.h]
Signed-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This adds reserved memory nodes to the SDX55 dtsi as defined by v6 of
the memory map
Signed-off-by: NVinod Koul <vkoul@kernel.org>
[mani: moved modem regions to board dts]
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-3-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

This adds pincontrol node to SDX55 dts.
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20210106125322.61840-2-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Add basic devicetree support for SDX55 platform and MTP board from
Qualcomm. The SDX55 platform features an ARM Cortex A7 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, BLSP, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..

Currently, this basic devicetree support includes GCC, RPMh clock, INTC
and Debug UART.
Co-developed-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201126083138.47047-3-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Document the SDX55 platform binding and also the boards using it.
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NVinod Koul <vkoul@kernel.org>
Signed-off-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201126083138.47047-2-manivannan.sadhasivam@linaro.orgSigned-off-by: NBjorn Andersson <bjorn.andersson@linaro.org>

Since commit 36e2c742 ("fs: don't allow splice read/write without
explicit ops") we've required that file operation structures explicitly
enable splice support, rather than falling back to the default handlers.

Most /proc files use the indirect 'struct proc_ops' to describe their
file operations, and were fixed up to support splice earlier in commits
40be821d..b24c30c6, but the mountinfo files interact with the
VFS directly using their own 'struct file_operations' and got missed as
a result.

This adds the necessary support for splice to work for /proc/*/mountinfo
and friends.
Reported-by: NJoan Bruguera Micó <joanbrugueram@gmail.com>
Reported-by: NJussi Kivilinna <jussi.kivilinna@iki.fi>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209971
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Pull NTB fixes from Jon Mason:
 "Bug fix for IDT NTB and Intel NTB LTR management support"

* tag 'ntb-5.11' of git://github.com/jonmason/ntb:
  ntb: intel: add Intel NTB LTR vendor support for gen4 NTB
  ntb: idt: fix error check in ntb_hw_idt.c

Pull crypto fixes from Herbert Xu:
 "Fix a number of autobuild failures due to missing Kconfig
  dependencies"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: qat - add CRYPTO_AES to Kconfig dependencies
  crypto: keembay - Add dependency on HAS_IOMEM
  crypto: keembay - CRYPTO_DEV_KEEMBAY_OCS_AES_SM4 should depend on ARCH_KEEMBAY

Pull objtool fix from Ingo Molnar:
 "Fix a segfault that occurs when built with Clang"

* tag 'objtool-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  objtool: Fix seg fault with Clang non-section symbols

Pull locking fixes from Ingo Molnar:
 "Misc fixes/updates:

   - Fix static keys usage in module __init sections

   - Add separate MAINTAINERS entry for static branches/calls

   - Fix lockdep splat with CONFIG_PREEMPTIRQ_EVENTS=y tracing"

* tag 'locking-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  softirq: Avoid bad tracing / lockdep interaction
  jump_label/static_call: Add MAINTAINERS
  jump_label: Fix usage in module __init

Pull timer fixes from Ingo Molnar:
 "Update/fix two CPU sanity checks in the hotplug and the boot code, and
  fix a typo in the Kconfig help text.

  [ Context: the first two commits are the result of an ongoing
    annotation+review work of (intentional) tick_do_timer_cpu() data
    races reported by KCSAN, but the annotations aren't fully cooked
    yet ]"

* tag 'timers-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  timekeeping: Fix spelling mistake in Kconfig "fullfill" -> "fulfill"
  tick/sched: Remove bogus boot "safety" check
  tick: Remove pointless cpu valid check in hotplug code

Pull scheduler fix from Ingo Molnar:
 "Fix a context switch performance regression"

* tag 'sched-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched: Optimize finish_lock_switch()

Commit c9a3c4e6 ("mfd: ab8500-debugfs: Remove extraneous curly
brace") removed a left-over curly brace that caused build failures, but
Joe Perches points out that the subsequent 'seq_putc()' should also be
removed, because the commit that caused all these problems already added
the final '\n' to the seq_printf() above it.
Reported-by: NJoe Perches <joe@perches.com>
Fixes: 886c8121 ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc")
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Pull PCI fixes from Bjorn Helgaas:

 - Fix a tegra enumeration regression (Rob Herring)

 - Fix a designware-host check that warned on *success*, not failure
   (Alexander Lobakin)

* tag 'pci-v5.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: dwc: Fix inverted condition of DMA mask setup warning
  PCI: tegra: Fix host link initialization

Clang errors:

  drivers/mfd/ab8500-debugfs.c:1526:2: error: non-void function does not return a value [-Werror,-Wreturn-type]
          }
          ^
  drivers/mfd/ab8500-debugfs.c:1528:2: error: expected identifier or '('
  return 0;
          ^
  drivers/mfd/ab8500-debugfs.c:1529:1: error: extraneous closing brace ('}')
  }
  ^
  3 errors generated.

The cleanup in ab8500_interrupts_show left a curly brace around, remove
it to fix the error.

Fixes: 886c8121 ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc")
Signed-off-by: NNathan Chancellor <natechancellor@gmail.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>