- 10 9月, 2011 2 次提交
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由 Jon Mason 提交于
Modifying the Maximum Read Request Size to 0 (value of 128Bytes) has massive negative ramifications on some devices. Without knowing which devices have this issue, do not modify from the default value when walking the PCI-E bus in pcie_bus_safe mode. Also, make pcie_bus_safe the default procedure. Tested-by: NSven Schnelle <svens@stackframe.org> Tested-by: NSimon Kirby <sim@hostway.ca> Tested-by: NStephen M. Cameron <scameron@beardog.cce.hp.com> Reported-and-tested-by: NEric Dumazet <eric.dumazet@gmail.com> Reported-and-tested-by: NNiels Ole Salscheider <niels_ole@salscheider-online.de> References: https://bugzilla.kernel.org/show_bug.cgi?id=42162Signed-off-by: NJon Mason <mason@myri.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Shyam Iyer 提交于
Commit b03e7495 ("PCI: Set PCI-E Max Payload Size on fabric") introduced a potential NULL pointer dereference in calls to pcie_bus_configure_settings due to attempts to access pci_bus self variables when the self pointer is NULL. To correct this, verify that the self pointer in pci_bus is non-NULL before dereferencing it. Reported-by: NStanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: NShyam Iyer <shyam_iyer@dell.com> Signed-off-by: NJon Mason <mason@myri.com> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 21 8月, 2011 1 次提交
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由 Randy Dunlap 提交于
Fix new kernel-doc warning in pci.c: Warning(drivers/pci/pci.c:3259): No description found for parameter 'mps' Warning(drivers/pci/pci.c:3259): Excess function parameter 'rq' description in 'pcie_set_mps' Signed-off-by: NRandy Dunlap <rdunlap@xenotime.net> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 19 8月, 2011 1 次提交
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由 David Daney 提交于
In pcibios_get_phb_of_node(), we will crash while booting if bus->bridge->parent is NULL. Check for this case and avoid dereferencing the NULL pointer. Signed-off-by: NDavid Daney <david.daney@cavium.com> Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 02 8月, 2011 7 次提交
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由 Jon Mason 提交于
pcie_bus_configure_settings needs to be exported if the PCI hotplug driver is being compiled as a module. Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NJon Mason <mason@myri.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Ram Pai 提交于
a) adjust_resource_sorted() is now called reassign_resource_sorted() b) nice-to-have is now called optional c) add_list is now called realloc_list. Signed-off-by: NRam Pai <linuxram@us.ibm.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Ram Pai 提交于
Allocate resources to cardbus bridge only after all other genuine resources requests are satisfied. Dont retry if resource allocation for cardbus-bridges fail. Signed-off-by: NRam Pai <linuxram@us.ibm.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yinghai Lu 提交于
From: Yinghai Lu <yinghai@kernel.org> Allocate resources to SRIOV BARs only after all other required resource-requests are satisfied. Dont retry if resource allocation for SRIOV BARs fail. Signed-off-by: NRam Pai <linuxram@us.ibm.com> Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Ram Pai 提交于
Currently pci-bridges are allocated enough resources to satisfy their immediate requirements. Any additional resource-requests fail if additional free space, contiguous to the one already allocated, is not available. This behavior is not reasonable since sufficient contiguous resources, that can satisfy the request, are available at a different location. This patch provides the ability to expand and relocate a allocated resource. v2: Changelog: Fixed size calculation in pci_reassign_resource() v3: Changelog : Split this patch. The resource.c changes are already upstream. All the pci driver changes are in here. Signed-off-by: NRam Pai <linuxram@us.ibm.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Yinghai Lu 提交于
git commit c8adf9a3 "PCI: pre-allocate additional resources to devices only after successful allocation of essential resources." fails to take into consideration the optional-resources needed by children devices while calculating the optional-resource needed by the bridge. This can be a problem on some setup. For example, if a hotplug bridge has 8 children hotplug bridges, the bridge should have enough resources to accomodate the hotplug requirements for each of its children hotplug bridges. Currently this is not the case. This patch fixes the problem. Signed-off-by: NYinghai Lu <yinghai@kernel.org> Reviewed-by: NRam Pai <linuxram@us.ibm.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Jon Mason 提交于
On a given PCI-E fabric, each device, bridge, and root port can have a different PCI-E maximum payload size. There is a sizable performance boost for having the largest possible maximum payload size on each PCI-E device. However, if improperly configured, fatal bus errors can occur. Thus, it is important to ensure that PCI-E payloads sends by a device are never larger than the MPS setting of all devices on the way to the destination. This can be achieved two ways: - A conservative approach is to use the smallest common denominator of the entire tree below a root complex for every device on that fabric. This means for example that having a 128 bytes MPS USB controller on one leg of a switch will dramatically reduce performances of a video card or 10GE adapter on another leg of that same switch. It also means that any hierarchy supporting hotplug slots (including expresscard or thunderbolt I suppose, dbl check that) will have to be entirely clamped to 128 bytes since we cannot predict what will be plugged into those slots, and we cannot change the MPS on a "live" system. - A more optimal way is possible, if it falls within a couple of constraints: * The top-level host bridge will never generate packets larger than the smallest TLP (or if it can be controlled independently from its MPS at least) * The device will never generate packets larger than MPS (which can be configured via MRRS) * No support of direct PCI-E <-> PCI-E transfers between devices without some additional code to specifically deal with that case Then we can use an approach that basically ignores downstream requests and focuses exclusively on upstream requests. In that case, all we need to care about is that a device MPS is no larger than its parent MPS, which allows us to keep all switches/bridges to the max MPS supported by their parent and eventually the PHB. In this case, your USB controller would no longer "starve" your 10GE Ethernet and your hotplug slots won't affect your global MPS. Additionally, the hotplugged devices themselves can be configured to a larger MPS up to the value configured in the hotplug bridge. To choose between the two available options, two PCI kernel boot args have been added to the PCI calls. "pcie_bus_safe" will provide the former behavior, while "pcie_bus_perf" will perform the latter behavior. By default, the latter behavior is used. NOTE: due to the location of the enablement, each arch will need to add calls to this function. This patch only enables x86. This patch includes a number of changes recommended by Benjamin Herrenschmidt. Tested-by: Jordan_Hargrave@dell.com Signed-off-by: NJon Mason <mason@myri.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 27 7月, 2011 2 次提交
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由 Arun Sharma 提交于
This allows us to move duplicated code in <asm/atomic.h> (atomic_inc_not_zero() for now) to <linux/atomic.h> Signed-off-by: NArun Sharma <asharma@fb.com> Reviewed-by: NEric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Cc: Eric Dumazet <eric.dumazet@gmail.com> Acked-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Al Viro 提交于
no, really, strlen() and snprintf() do not return mode_t values... Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 23 7月, 2011 5 次提交
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由 Bjorn Helgaas 提交于
I don't think there's enough value in the fact of a bridge window being disabled to justify cluttering the dmesg log with it. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Bjorn Helgaas 提交于
decode_bar() and pci_calc_resource_flags() both looked at the PCI BAR type information, and it's simpler to just do it all in one place. decode_bar() sets IORESOURCE_IO, IORESOURCE_MEM, and IORESOURCE_MEM_64 as appropriate, so res->flags contains all the information pci_bar_type does, so we don't need to test the pci_bar_type return value. decode_bar() used to return pci_bar_type, which we no longer need. We can simplify it a bit by returning the struct resource flags rather than updating them internally. In pci_update_resource(), there's no need to decode the BAR type bits again; we can just test for IORESOURCE_MEM_64 directly. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Bjorn Helgaas 提交于
This fixes a minor regression where broken PCI devices that use the reserved "11" memory BAR type worked before e354597c but not after. The low four bits of a memory BAR are "PTT0" where P=1 for prefetchable BARs, and TT is as follows: 00 32-bit BAR, anywhere in lower 4GB 01 anywhere below 1MB (reserved as of PCI 2.2) 10 64-bit BAR 11 reserved Prior to e354597c, we treated "0100" as a 64-bit BAR and all others, including prefetchable 64-bit BARs ("1100") as 32-bit BARs. The e354597c fix, which appeared in 2.6.28, treats "x1x0" as 64-bit BARs, so the reserved "x110" types are treated as 64-bit instead of 32-bit. This patch returns to treating the reserved "11" type as a 32-bit BAR and adds a warning if we see it. It also logs a note if we see a 1M BAR. This is not a warning, because such hardware conforms to pre-PCI 2.2 spec, but I think it's worth noting because Linux ignores the 1M restriction if it ever has to assign the BAR. CC: Peter Chubb <peterc@gelato.unsw.edu.au> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=35952Reported-by: NJan Zwiegers <jan@radicalsystems.co.za> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Jon Mason 提交于
When setting the PCI-E MRRS, pcie_set_readrq queries the current settings via a pci_read_config_word call but writes the modified result via a pci_write_config_dword. This results in writing 16 more bits than were queried. Also, the function description comment is slightly incorrect. Signed-off-by: NJon Mason <jdmason@kudzu.us> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Kenji Kaneshige 提交于
Naoki Yanagimoto reported that configuration read on some hot-added PCIe device returns invalid value. This patch fixes this problem. According to the PCIe spec, software must wait for at least 1 second to judge if the hot-added device is broken after Data Link Layer State Changed Event. This patch changes pciehp driver to wait for 1 second after the Data Link Layer State Changed Event is detected before initiating a configuration access instead of 100 ms. Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Tested-by: NNaoki Yanagimoto <yanagimoto@np.css.fujitsu.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 22 7月, 2011 7 次提交
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由 Chris Wright 提交于
The function pci_enable_ari() may mistakenly set the downstream port of a v1 PCIe switch in ARI Forwarding mode. This is a PCIe v2 feature, and with an SR-IOV device on that switch port believing the switch above is ARI capable it may attempt to use functions 8-255, translating into invalid (non-zero) device numbers for that bus. This has been seen to cause Completion Timeouts and general misbehaviour including hangs and panics. Cc: stable@kernel.org Acked-by: NDon Dutile <ddutile@redhat.com> Tested-by: NDon Dutile <ddutile@redhat.com> Signed-off-by: NChris Wright <chrisw@sous-sol.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Ralf Baechle 提交于
Aside of the usual motivation for constification, this function has a history of being abused a hook for interrupt and other fixups so I turned this function const ages ago in the MIPS code but it should be done treewide. Due to function pointer passing in varous places a few other functions had to be constified as well. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> To: Anton Vorontsov <avorontsov@mvista.com> To: Chris Metcalf <cmetcalf@tilera.com> To: Colin Cross <ccross@android.com> Acked-by: N"David S. Miller" <davem@davemloft.net> To: Eric Miao <eric.y.miao@gmail.com> To: Erik Gilling <konkers@android.com> Acked-by: NGuan Xuetao <gxt@mprc.pku.edu.cn> To: "H. Peter Anvin" <hpa@zytor.com> To: Imre Kaloz <kaloz@openwrt.org> To: Ingo Molnar <mingo@redhat.com> To: Ivan Kokshaysky <ink@jurassic.park.msu.ru> To: Jesse Barnes <jbarnes@virtuousgeek.org> To: Krzysztof Halasa <khc@pm.waw.pl> To: Lennert Buytenhek <kernel@wantstofly.org> To: Matt Turner <mattst88@gmail.com> To: Nicolas Pitre <nico@fluxnic.net> To: Olof Johansson <olof@lixom.net> Acked-by: NPaul Mundt <lethal@linux-sh.org> To: Richard Henderson <rth@twiddle.net> To: Russell King <linux@arm.linux.org.uk> To: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-alpha@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-pci@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: sparclinux@vger.kernel.org Cc: x86@kernel.org Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Sergei Shtylyov 提交于
The driver reads PCI vendor ID from the PCI configuration register while it is already stored by the PCI subsystem in the 'vendor' field of 'struct pci_dev'... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Sergei Shtylyov 提交于
The driver reads PCI subsystem IDs from the PCI configuration registers while they are already stored by the PCI subsystem in the 'subsystem_{vendor|device}' fields of 'struct pci_dev'... Signed-off-by: NSergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Tiejun Chen 提交于
When hot-plugging a root bridge, we always prevent assigning a bus number that already exists. This makes sure we don't step over an existing bus. But sometimes we only remove PCI device in PCI hieratchy of OS, i,e. echo 1 > /sys/bus/pci/devices/.../remove but actually don't hotplug this device out the platform, so in this case we still should re-scan this bus to enumerate this device when re-scanning PCI again. Signed-off-by: NTiejun Chen <tiejun.chen@windriver.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Huang Ying 提交于
In addition to native PCIe AER, now APEI (ACPI Platform Error Interface) GHES (Generic Hardware Error Source) can be used to report PCIe AER errors too. To add support to APEI GHES PCIe AER recovery, aer_recover_queue is added to export the recovery function in native PCIe AER driver. Recoverable PCIe AER errors are reported via NMI in APEI GHES. Then APEI GHES uses irq_work to delay the error processing into an IRQ handler. But PCIe AER recovery can be very time-consuming, so aer_recover_queue, which can be used in IRQ handler, delays the real recovery action into the process context, that is, work queue. Signed-off-by: NHuang Ying <ying.huang@intel.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Thomas Renninger 提交于
While it's declared static, etags points you to the wrong function in drivers/acpi/dock.c and acpiphp_glue.c for example also makes use of some (exported..) functions from this file. If you trust etags and oversee the static declaration (what happened to me) one gets totally confused... Signed-off-by: NThomas Renninger <trenn@suse.de> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 21 7月, 2011 1 次提交
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由 Manoj Iyer 提交于
Ricoh 1180:e823 does not recognize certain types of SD/MMC cards, as reported at http://launchpad.net/bugs/773524. Lowering the SD base clock frequency from 200Mhz to 50Mhz fixes this issue. This solution was suggest by Koji Matsumuro, Ricoh Company, Ltd. This change has no negative performance effect on standard SD cards, though it's quite possible that there will be one on UHS-1 cards. Signed-off-by: NManoj Iyer <manoj.iyer@canonical.com> Tested-by: NDaniel Manrique <daniel.manrique@canonical.com> Cc: Koji Matsumuro <matsumur@nts.ricoh.co.jp> Cc: <stable@kernel.org> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 17 7月, 2011 1 次提交
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由 Vasiliy Kulikov 提交于
Structs battery_file, acpi_dock_ops, file_operations, thermal_cooling_device_ops, thermal_zone_device_ops, kernel_param_ops are not changed in runtime. It is safe to make them const. register_hotplug_dock_device() was altered to take const "ops" argument to respect acpi_dock_ops' const notion. Signed-off-by: NVasiliy Kulikov <segoon@openwall.com> Acked-by: NJeff Garzik <jgarzik@redhat.com> Signed-off-by: NLen Brown <len.brown@intel.com>
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- 09 7月, 2011 1 次提交
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由 Ram Pai 提交于
Multiple attempts to dynamically reallocate pci resources have unfortunately lead to regressions. Though we continue to fix the regressions and fine tune the dynamic-reallocation behavior, we have not reached a acceptable state yet. This patch provides a interim solution. It disables dynamic reallocation by default, but adds the ability to enable it through pci=realloc kernel command line parameter. Tested-by: NOliver Hartkopp <socketcan@hartkopp.net> Signed-off-by: NRam Pai <linuxram@us.ibm.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 06 7月, 2011 1 次提交
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由 Rafael J. Wysocki 提交于
A subsequent patch is going to move the invocation of pm_runtime_barrier() from dpm_prepare() to __device_suspend(). Consequently, early wakeup events resulting from runtime resume requests for wakeup devices queued up right before system suspend will only be detected after all of the subsystem-level .prepare() callbacks have run. However, the PCI bus type calls pm_runtime_get_sync() from its pci_pm_prepare() callback routine, so it would destroy the early wakeup events information regarding PCI devices. To prevent this from happening add an early wakeup detection mechanism, analogous to the one currently in dpm_prepare(), to pci_pm_prepare(). Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 29 6月, 2011 1 次提交
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由 Michael Witten 提交于
Merriam-Webster tells us that the word exists. However ... * Google suggests `forcibly' because it doesn't recognize `forcedly'. * Google lists 494 thousand results for `forcedly'. * Google lists 13.7 million results for `forcibly'. * Linus's repo contains 1 occurrence of `forcedly' ( 0 after my change). * Linus's repo contains 60 occurrences of `forcibly' (61 after my change). Signed-off-by: NMichael Witten <mfwitten@gmail.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 22 6月, 2011 1 次提交
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由 Rafael J. Wysocki 提交于
After commit e8665002 (PM: Allow pm_runtime_suspend() to succeed during system suspend) it is possible that a device resumed by the pm_runtime_resume(dev) in pci_pm_prepare() will be suspended immediately from a work item, timer function or otherwise, defeating the very purpose of calling pm_runtime_resume(dev) from there. To prevent that from happening it is necessary to increment the runtime PM usage counter of the device by replacing pm_runtime_resume() with pm_runtime_get_sync(). Moreover, the incremented runtime PM usage counter has to be decremented by the corresponding pci_pm_complete(), via pm_runtime_put_sync(). Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl> Cc: stable@kernel.org Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 21 6月, 2011 1 次提交
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由 Ohad Ben-Cohen 提交于
This should ease finding similarities with different platforms, with the intention of solving problems once in a generic framework which everyone can use. Note: to move intel-iommu.c, the declaration of pci_find_upstream_pcie_bridge() has to move from drivers/pci/pci.h to include/linux/pci.h. This is handled in this patch, too. As suggested, also drop DMAR's EXPERIMENTAL tag while we're at it. Compile-tested on x86_64. Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com> Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 19 6月, 2011 1 次提交
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由 Manoj Iyer 提交于
Signed-off-by: NManoj Iyer <manoj.iyer@canonical.com> Cc: <stable@kernel.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 14 6月, 2011 1 次提交
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由 Dave Airlie 提交于
When I added 3448a19d I forgot about the special uv handling code for this, so this patch fixes it up. Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org> Acked-by: Ingo Molnar Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 10 6月, 2011 1 次提交
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由 Joe Perches 提交于
Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 08 6月, 2011 2 次提交
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由 Benjamin Herrenschmidt 提交于
powerpc has two different ways of matching PCI devices to their corresponding OF node (if any) for historical reasons. The ppc64 one does a scan looking for matching bus/dev/fn, while the ppc32 one does a scan looking only for matching dev/fn on each level in order to be agnostic to busses being renumbered (which Linux does on some platforms). This removes both and instead moves the matching code to the PCI core itself. It's the most logical place to do it: when a pci_dev is created, we know the parent and thus can do a single level scan for the matching device_node (if any). The benefit is that all archs now get the matching for free. There's one hook the arch might want to provide to match a PHB bus to its device node. A default weak implementation is provided that looks for the parent device device node, but it's not entirely reliable on powerpc for various reasons so powerpc provides its own. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: NMichal Simek <monstr@monstr.eu> Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Rafael J. Wysocki 提交于
If CONFIG_PM is not set, init_iommu_pm_ops() introduced by commit 134fac3f (PCI / Intel IOMMU: Use syscore_ops instead of sysdev class and sysdev) is not defined appropriately. Fix this issue. Reported-by: NTony Luck <tony.luck@intel.com> Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
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- 03 6月, 2011 1 次提交
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由 Daniel Hellstrom 提交于
The LEON architecture does not have a BIOS or bootloader that initializes PCI for us, instead Linux generic PCI layer is used to set up resources and IRQ. Signed-off-by: NDaniel Hellstrom <daniel@gaisler.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 6月, 2011 1 次提交
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由 Randy Dunlap 提交于
Fix pci.c kernel-doc warnings: Warning(drivers/pci/pci.c:3292): No description found for parameter 'flags' Warning(drivers/pci/pci.c:3292): Excess function parameter 'change_bridge_flags' description in 'pci_set_vga_state' Signed-off-by: NRandy Dunlap <randy.dunlap@oracle.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 01 6月, 2011 1 次提交
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由 David Woodhouse 提交于
We were mapping an extra byte (and hence usually an extra page): iommu_prepare_identity_map() expects to be given an 'end' argument which is the last byte to be mapped; not the first byte *not* to be mapped. Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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