1. 10 9月, 2011 2 次提交
  2. 21 8月, 2011 1 次提交
  3. 19 8月, 2011 1 次提交
  4. 02 8月, 2011 7 次提交
    • J
      PCI: export pcie_bus_configure_settings symbol · debc3b77
      Jon Mason 提交于
      pcie_bus_configure_settings needs to be exported if the PCI hotplug
      driver is being compiled as a module.
      Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Signed-off-by: NJon Mason <mason@myri.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      debc3b77
    • R
      PCI: code and comments cleanup · 9e8bf93a
      Ram Pai 提交于
      a) adjust_resource_sorted() is now called reassign_resource_sorted()
      b) nice-to-have is now called optional
      c) add_list is now called realloc_list.
      Signed-off-by: NRam Pai <linuxram@us.ibm.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      9e8bf93a
    • R
      PCI: make cardbus-bridge resources optional · 0a2daa1c
      Ram Pai 提交于
      Allocate resources to cardbus bridge only after all other genuine
      resources requests are satisfied. Dont retry if resource allocation
      for cardbus-bridges fail.
      Signed-off-by: NRam Pai <linuxram@us.ibm.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      0a2daa1c
    • Y
      PCI: make SRIOV resources optional · 2aceefcb
      Yinghai Lu 提交于
      From: Yinghai Lu <yinghai@kernel.org>
      
      Allocate resources to SRIOV BARs only after all other required
      resource-requests are satisfied. Dont retry if resource allocation for SRIOV
      BARs fail.
      Signed-off-by: NRam Pai <linuxram@us.ibm.com>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      2aceefcb
    • R
      PCI : ability to relocate assigned pci-resources · 2bbc6942
      Ram Pai 提交于
      Currently pci-bridges are allocated enough resources to satisfy their immediate
      requirements.  Any additional resource-requests fail if additional free space,
      contiguous to the one already allocated, is not available. This behavior is not
      reasonable since sufficient contiguous resources, that can satisfy the request,
      are available at a different location.
      
      This patch provides the ability to expand and relocate a allocated resource.
      
      	v2: Changelog: Fixed size calculation in pci_reassign_resource()
      	v3: Changelog : Split this patch. The resource.c changes are already
      			upstream. All the pci driver changes are in here.
      Signed-off-by: NRam Pai <linuxram@us.ibm.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      2bbc6942
    • Y
      PCI: honor child buses add_size in hot plug configuration · be768912
      Yinghai Lu 提交于
      git commit c8adf9a3
          "PCI: pre-allocate additional resources to devices only after
      	successful allocation of essential resources."
      
      fails to take into consideration the optional-resources needed by children
      devices while calculating the optional-resource needed by the bridge.
      
      This can be a problem on some setup. For example, if a hotplug bridge has 8
      children hotplug bridges, the bridge should have enough resources to accomodate
      the hotplug requirements for each of its children hotplug bridges.  Currently
      this is not the case.
      
      This patch fixes the problem.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Reviewed-by: NRam Pai <linuxram@us.ibm.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      be768912
    • J
      PCI: Set PCI-E Max Payload Size on fabric · b03e7495
      Jon Mason 提交于
      On a given PCI-E fabric, each device, bridge, and root port can have a
      different PCI-E maximum payload size.  There is a sizable performance
      boost for having the largest possible maximum payload size on each PCI-E
      device.  However, if improperly configured, fatal bus errors can occur.
      Thus, it is important to ensure that PCI-E payloads sends by a device
      are never larger than the MPS setting of all devices on the way to the
      destination.
      
      This can be achieved two ways:
      
      - A conservative approach is to use the smallest common denominator of
        the entire tree below a root complex for every device on that fabric.
      
      This means for example that having a 128 bytes MPS USB controller on one
      leg of a switch will dramatically reduce performances of a video card or
      10GE adapter on another leg of that same switch.
      
      It also means that any hierarchy supporting hotplug slots (including
      expresscard or thunderbolt I suppose, dbl check that) will have to be
      entirely clamped to 128 bytes since we cannot predict what will be
      plugged into those slots, and we cannot change the MPS on a "live"
      system.
      
      - A more optimal way is possible, if it falls within a couple of
        constraints:
      * The top-level host bridge will never generate packets larger than the
        smallest TLP (or if it can be controlled independently from its MPS at
        least)
      * The device will never generate packets larger than MPS (which can be
        configured via MRRS)
      * No support of direct PCI-E <-> PCI-E transfers between devices without
        some additional code to specifically deal with that case
      
      Then we can use an approach that basically ignores downstream requests
      and focuses exclusively on upstream requests. In that case, all we need
      to care about is that a device MPS is no larger than its parent MPS,
      which allows us to keep all switches/bridges to the max MPS supported by
      their parent and eventually the PHB.
      
      In this case, your USB controller would no longer "starve" your 10GE
      Ethernet and your hotplug slots won't affect your global MPS.
      Additionally, the hotplugged devices themselves can be configured to a
      larger MPS up to the value configured in the hotplug bridge.
      
      To choose between the two available options, two PCI kernel boot args
      have been added to the PCI calls.  "pcie_bus_safe" will provide the
      former behavior, while "pcie_bus_perf" will perform the latter behavior.
      By default, the latter behavior is used.
      
      NOTE: due to the location of the enablement, each arch will need to add
      calls to this function.  This patch only enables x86.
      
      This patch includes a number of changes recommended by Benjamin
      Herrenschmidt.
      
      Tested-by: Jordan_Hargrave@dell.com
      Signed-off-by: NJon Mason <mason@myri.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      b03e7495
  5. 27 7月, 2011 2 次提交
  6. 23 7月, 2011 5 次提交
  7. 22 7月, 2011 7 次提交
  8. 21 7月, 2011 1 次提交
  9. 17 7月, 2011 1 次提交
  10. 09 7月, 2011 1 次提交
  11. 06 7月, 2011 1 次提交
    • R
      PCI / PM: Detect early wakeup in pci_pm_prepare() · eea3fc03
      Rafael J. Wysocki 提交于
      A subsequent patch is going to move the invocation of
      pm_runtime_barrier() from dpm_prepare() to __device_suspend().
      Consequently, early wakeup events resulting from runtime resume
      requests for wakeup devices queued up right before system suspend
      will only be detected after all of the subsystem-level .prepare()
      callbacks have run.  However, the PCI bus type calls
      pm_runtime_get_sync() from its pci_pm_prepare() callback routine,
      so it would destroy the early wakeup events information regarding PCI
      devices.  To prevent this from happening add an early wakeup
      detection mechanism, analogous to the one currently in dpm_prepare(),
      to pci_pm_prepare().
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      eea3fc03
  12. 29 6月, 2011 1 次提交
    • M
      PCIe ASPM: forcedly -> forcibly · 8072ba1b
      Michael Witten 提交于
      Merriam-Webster tells us that the word exists. However ...
      
        * Google suggests `forcibly' because it doesn't recognize `forcedly'.
        * Google lists 494 thousand results for `forcedly'.
        * Google lists 13.7 million results for `forcibly'.
        * Linus's repo contains  1 occurrence  of `forcedly' ( 0 after my change).
        * Linus's repo contains 60 occurrences of `forcibly' (61 after my change).
      Signed-off-by: NMichael Witten <mfwitten@gmail.com>
      Signed-off-by: NJiri Kosina <jkosina@suse.cz>
      8072ba1b
  13. 22 6月, 2011 1 次提交
    • R
      PCI / PM: Block races between runtime PM and system sleep · a5f76d5e
      Rafael J. Wysocki 提交于
      After commit e8665002
      (PM: Allow pm_runtime_suspend() to succeed during system suspend) it
      is possible that a device resumed by the pm_runtime_resume(dev) in
      pci_pm_prepare() will be suspended immediately from a work item,
      timer function or otherwise, defeating the very purpose of calling
      pm_runtime_resume(dev) from there.  To prevent that from happening
      it is necessary to increment the runtime PM usage counter of the
      device by replacing pm_runtime_resume() with pm_runtime_get_sync().
      Moreover, the incremented runtime PM usage counter has to be
      decremented by the corresponding pci_pm_complete(), via
      pm_runtime_put_sync().
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Cc: stable@kernel.org
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      a5f76d5e
  14. 21 6月, 2011 1 次提交
    • O
      x86/ia64: intel-iommu: move to drivers/iommu/ · 166e9278
      Ohad Ben-Cohen 提交于
      This should ease finding similarities with different platforms,
      with the intention of solving problems once in a generic framework
      which everyone can use.
      
      Note: to move intel-iommu.c, the declaration of pci_find_upstream_pcie_bridge()
      has to move from drivers/pci/pci.h to include/linux/pci.h. This is handled
      in this patch, too.
      
      As suggested, also drop DMAR's EXPERIMENTAL tag while we're at it.
      
      Compile-tested on x86_64.
      Signed-off-by: NOhad Ben-Cohen <ohad@wizery.com>
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      166e9278
  15. 19 6月, 2011 1 次提交
  16. 14 6月, 2011 1 次提交
  17. 10 6月, 2011 1 次提交
  18. 08 6月, 2011 2 次提交
  19. 03 6月, 2011 1 次提交
  20. 02 6月, 2011 1 次提交
  21. 01 6月, 2011 1 次提交