The compatible string "simple-bus" is well defined in ePAPR, while
I see no documentation for the "arm,amba-bus" arnywhere in ePAPR or
Documentation/devicetree/.

DT is also used by other projects than Linux kernel.  It is not a
good idea to rely on such an unofficial binding.

This commit
  - replaces "arm,amba-bus" with "simple-bus"
  - drops "arm,amba-bus" where it is used along with "simple-bus"
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Relaxed the license on the dtsi to permit use in other projects.
Signed-off-by: NLars Persson <larper@axis.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

This adds the Synaptics RMI4 touchscreen to the Ux500 TVK
user interface board. Tested on the U8500 HREFv60plus with
the TVK UIB.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add the three leds on the sama5d2 Xplained board with their pinctrl node.
The blue led is positioned with the "heartbeat" trigger.
Signed-off-by: NWenyou Yang <wenyou.yang@atmel.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: add commit message and adapt to newer kernel]
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Add the push button named "PB USER" with code 0x104. Associated pinctrl node is
also added.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

For USB gadget on port A (device mode):
- pin PA31 is configured as an input GPIO which triggers an interrupt when
  vbus is detected on USB port A.
- pin PB9 is configured as an output GPIO and set to low level so the
  board doesn't supply vbus to USB port A.

For USB host:
- pin PB10 is configured as an output GPIO and is active at high level.
  The ohci driver will activate this pin so the board supplies vbus to USB
  port B.
- pin PB9 should be configured as an output GPIO and active at high level
  to use to USB port A in host mode (conflicts with USB gadget).
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

MAC is connected to a PHY in MII mode.
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

In  the final versions of the Porter board (called "PORTER_C") Renesas
decided to get rid  of the Maxim Integrated MAX3355 OTG chip and didn't
add any other provision to differ the host/gadget mode, so we'll have to
remove  no longer valid "renesas,enable-gpio" property from the HS-USB
device node.  Hopefully, the earlier revisions of the board were never
seen in the wild...

Fixes: c794f6a0 ("ARM: shmobile: porter: add HS-USB DT support")
Reported-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This adds support for the volume and gesture keys, using TWL4030 keypad.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This reverts commit 5fcc6730.

The binding may need to change pending related hwmod comments,
so reverting as requested by Paul Walmsley <paul@pwsan.com>.

The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].

[1] dm814x TRM: SPRUGZ8F: 11.2.4.12.2 NAND Device-Ready Pin
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add Ethernet support (Synopsys MAC IP 3.50a) on stm32f429 SOC.
Signed-off-by: NAlexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

Signed-off-by: NAlexandre TORGUE <alexandre.torgue@gmail.com>
Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com>

Both nodes are required to access NAND Flash memory. Additional
settings will be necessary at the board level to use it.
Tested-by: NWenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The dmas/dma-names properties are added to the UART nodes. Note that additional
properties are needed to enable them at the board level: check bindings for
details.
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

All pinctrl nodes for the Atmel pinctrl controller need to have their
bias configuration explicitly defined. Otherwise, the pinctrl mapping
is not valid.

It works for now as the pinctrl driver proceeds even with invalid
mappings, but this can become an issue, if the pinctrl driver starts
to require valid mappings. Additionally, the pin is not protected from
being remapped later by an other driver.

There is an external 1kOhms pull-up to 3.3V, so no bias is required on
the Ethernet PHY's interrupt line.
Signed-off-by: NRomain Izard <romain.izard.pro@gmail.com>
Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

After adding cpufreq-dt support to Exynos542x, the Odroid XU3-Lite can
be easily overheated when launching eight CPU-intensive tasks:
	thermal thermal_zone3: critical temperature reached(121 C),shutting down

This seems to be specific to Odroid XU3-Lite board which officially
supports lower frequencies than regular XU3 or XU4. When working at
maximum CPU speed (1800 MHz big and 1300 MHz LITTLE) in warmer place for
longer time, the fan fails to cool down the board and it reaches
critical temperature.

Add CPU cooling to Exynos5422/5800 to fix this issue. When reaching last
interrupt-driven trip-point (70 degrees of Celsius) start passive
cooling in polling mode (slowing CPU by 2 steps). When reaching 85
degrees of Celsius, start slowing even more, down to 600 MHz.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

On Exynos5422 and Exynos5800 we support 12 cpufreq steps (200-1300 MHz) for LITTLE
and 18 steps for big core (200-1700 MHz). Add respective cooling cells.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

On Exynos5420 we support 8 cpufreq steps (600-1300 MHz) for LITTLE and
12 steps for big core (700-1800 MHz). Add respective cooling cells.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.
Signed-off-by: NVignesh R <vigneshr@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

tbclk is used by ehrpwm to generate PWM waveform on DRA7 SoC. Add Linux
clock to control ehrpwm tbclk.
The TRM says, tbclk is derived from SYSCLKOUT. SYSCLKOUT is nothing but
ehrpwm functional clock derived from the gateable interface and
functional clock of PWMSS(l4_root_clk_div).
Refer AM57x TRM SPRUHZ6[1], October 2014, Table 29-4 and Section 29.2.2.1,
Table 29-19 and the NOTE at the end of the table.

[1] www.ti.com/lit/ug/spruhz6/spruhz6.pdf
Signed-off-by: NVignesh R <vigneshr@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

DRA7 SoC has the capability to support DDR memory upto 4GB. In order to
represent this in memory dt node, the address-cells and size cells
should be 2. So, changing the address-cells and size-cells to 2 and
updating the memory nodes accordingly.
Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This adds support for USB OTG on the Optimus Black.
The HSUSB0 interface is connected to the TWL4030 USB PHY.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The LG Optimus Black codename sniper is a smartphone that was designed and
manufactured by LG Electronics (LGE) and released back in 2011.
It is using an OMAP3630 SoC, GP version.

This adds devicetree support for the device, with only a few basic features
supported, such as debug uart, i2c, internal emmc and external mmc.
Signed-off-by: NPaul Kocialkowski <contact@paulk.fr>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This reverts commit 8ba671ef.

As reported by kbuild test robot <fengguang.wu@intel.com>:

   In file included from arch/arm/boot/dts/mt2701-evb.dts:16:0:
>> arch/arm/boot/dts/mt2701.dtsi:18:28: fatal error: mt2701-pinfunc.h: No such file or directory
    #include "mt2701-pinfunc.h"
                               ^
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Since the switch from mmp_pdma to pxa_dma driver for pxa architectures,
the pxa_dma requires 2 arguments, namely the requestor line and the
requested priority.

Fix the only left device node which was still passing only one argument,
making the pxa3xx-nand driver misbehave in a device-tree configuration,
ie. failing all data transfers.

Fixes: c943646d ("ARM: dts: pxa: add dma engine node to pxa3xx-nand")
Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>

With the newly available MSIX driver for Alpine, add the corresponding
node in the Alpine device tree.
Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

OrangePi Plus board has dwo leds - green ("pwr") and red ("status")
and a switch ("sw4"). This patch describes them in a devicetree.
Signed-off-by: NKrzysztof Adamski <k@japko.eu>
Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>

This patch adds correct aliases to spi and i2c buses so that they get
correct matching bus numbers.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds i2c6 device node and pinctrls required for IFC6410 on
MIPI-CSI connector.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch enables i2c bus for camera via mipi-csi connector on ifc6410.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds gsbi4 and i2c node.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds missing i2c2 pinctrl information in i2c2 node.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch enables spi device on the 30 pin expansion connector.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds spi5 device node, spi5 is used on ifc6410 on the
expansion connector.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds missing i2c pinctrl sleep states.
Also add 16mA drive strength to the pins so that we can detect wide
range of i2c devices on the other side of level shifters.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch adds PCIE support to APQ8064, tested with Ethernet on
Compulab QS600 board.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

As there are more pinctrls to come, moving these to dedicated dtsi makes
more sense.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>

This patch fixes i2c lables to be inline with serial labels.
The reason to do this is that it would look odd if we add aliases in the
board file along with serial.
Signed-off-by: NSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: NAndy Gross <andy.gross@linaro.org>