Enable compile-testing of the stp-xway GPIO driver now that it does not
depend on any architecture specific includes anymore.
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20190702223248.31934-5-martin.blumenstingl@googlemail.comSigned-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver was using the OF GPIO helper API, but barely used any of its
features and it cost more code than it saved. Also, the OF GPIO code is
now deprecated. Convert it to use a more standard setup and use devm
APIs for initialization to avoid the need for a remove function.

Our rationale for this change is that we are using the Xilinx GPIO with
resources injected using the MFD core rather than on the device tree
itself. Using platform rather than OF-specific resources allows this to
work for free.
Signed-off-by: NRobert Hancock <hancock@sedsystems.ca>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add K3 dependencies to enable the driver on K3 platforms.
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This feature is deprecated, it is helpful to inform users about
this. I'm resisting the temptation to add "depends on BROKEN"
to this, but saving that for later.
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The gpio-adp5588 driver uses interfaces that are provided by
GPIOLIB_IRQCHIP, so select that symbol in its Kconfig entry.

Fixes these build errors:

../drivers/gpio/gpio-adp5588.c: In function ‘adp5588_irq_handler’:
../drivers/gpio/gpio-adp5588.c:266:26: error: ‘struct gpio_chip’ has no member named ‘irq’
            dev->gpio_chip.irq.domain, gpio));
                          ^
../drivers/gpio/gpio-adp5588.c: In function ‘adp5588_irq_setup’:
../drivers/gpio/gpio-adp5588.c:298:2: error: implicit declaration of function ‘gpiochip_irqchip_add_nested’ [-Werror=implicit-function-declaration]
  ret = gpiochip_irqchip_add_nested(&dev->gpio_chip,
  ^
../drivers/gpio/gpio-adp5588.c:307:2: error: implicit declaration of function ‘gpiochip_set_nested_irqchip’ [-Werror=implicit-function-declaration]
  gpiochip_set_nested_irqchip(&dev->gpio_chip,
  ^

Fixes: 459773ae ("gpio: adp5588-gpio: support interrupt controller")
Reported-by: Nkbuild test robot <lkp@intel.com>
Signed-off-by: NRandy Dunlap <rdunlap@infradead.org>
Cc: linux-gpio@vger.kernel.org
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Add GPIO support for max77650 mfd device. This PMIC exposes a single
GPIO line.
Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

This adds a driver for the IXP4xx GPIO block found in
the Intel XScale IXP4xx systems.

The GPIO part of this block is pretty straight-forward and
just uses the generic MMIO GPIO library.

The irqchip side of this driver is hierarchical where
the main irqchip will receive a processed level trigger
in response to the edge detector of the GPIO block,
so for this reason the v2 version of the irqdomain API
is used (as well as in the parent IXP4xx irqchip) and
masking, unmasking and setting up the type on IRQ
happens on several levels.

Currently this GPIO controller will grab the parent
irqdomain using a special function, but as the platform
move toward device tree probing, this will not be needed:
we can just look up the parent irqdomain from the device
tree.

Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Make the anon_inodes facility unconditional so that it can be used by core
VFS code and pidfd code.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
[christian@brauner.io: adapt commit message to mention pidfds]
Signed-off-by: NChristian Brauner <christian@brauner.io>

Align the Kconfig formatting with the vast majority of the Kconfig
files, to make it a bit easier / more pleasant to read ;-)
Signed-off-by: NEnrico Weigelt, metux IT consult <info@metux.net>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fixes a compile test failure

Fixes: c78c42d7 ("gpio: add driver for Mellanox BlueField GPIO controller")
Signed-off-by: NShravan Kumar Ramani <sramani@mellanox.com>
Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

This patch adds support for the GPIO controller used by Mellanox
BlueField SOCs.
Reviewed-by: NDavid Woods <dwoods@mellanox.com>
Signed-off-by: NShravan Kumar Ramani <sramani@mellanox.com>
Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

The testing driver doesn't really depend on HAS_IOMEM. We may want to
build it for testing purposes on architectures not supporting IOMEM,
for example: on user-mode linux. Move it out of the "Memory Mapped GPIO
drivers" section.
Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

The testing module doesn't need GPIO irqchip nor does it depend on
sysfs. Remove unnecessary dependencies from Kconfig.
Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>

Make the anon_inodes facility unconditional so that it can be used by core
VFS code.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

GPIO platform driver for the AMD G-series PCH (eg. on GX-412TC)

This driver doesn't registers itself automatically, as it needs to
be provided with platform specific configuration, provided by some
board driver setup code.

Didn't implement oftree probing yet, as it's rarely found on x86.

Cc: linux-gpio@vger.kernel.org
Cc: linus.walleij@linaro.org
Cc: bgolaszewski@baylibre.com
Cc: dvhart@infradead.org
Cc: platform-driver-x86@vger.kernel.org
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NEnrico Weigelt, metux IT consult <info@metux.net>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds a driver for Gateworks PLD GPIO, that exist in
two instances on the Gateworks Cambria GW2358-4 router
platform at least.

Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Some TQ-Systems ComExpress modules contain an IO controller with 8
GPIO lines.
Signed-off-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch implements level-triggered IRQs in the Hollywood GPIO driver.
Edge triggered interrupts are not supported in this GPIO controller, so
I moved their emulation into a separate patch.
Signed-off-by: NJonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver clearly needs OF_GPIO so depend on it.
Fixes a build error.

Cc: Andrei Stefanescu <Andrei.Stefanescu@microchip.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds a driver for Cadence GPIO controller.

It can be enabled with GPIO_CADENCE Kconfig option.
It uses generic GPIO infrastructure and works
as an interrupt controller.
At the moment it only supports level sensitive irqs.
Signed-off-by: NJan Kotas <jank@cadence.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

PIOBU pins do not lose their voltage during Backup/Self-refresh.
This patch adds a simple GPIO controller for them and a
maintainer for the driver.

This driver adds support for using the pins as GPIO
offering the possibility to read/set the voltage.
Signed-off-by: NAndrei Stefanescu <andrei.stefanescu@microchip.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Select REGMAP_I2C in Kconfig, since the driver now depends on regmap
and this was missing, thus breaking build on various systems.
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The change adds support of LPC18xx/LPC43xx GPIO pin interrupt controller
block within SoC GPIO controller. The new interrupt controller driver
allows to configure and capture edge or level interrupts on 8 arbitrary
selectedinput GPIO pins, and lift the signals to be reported as NVIC rising
edge interrupts. Configuration of a particular GPIO pin to serve as
interrupt and its mapping to an interrupt on NVIC is done by SCU pin
controller, for more details see description of 'nxp,gpio-pin-interrupt'
device tree property of a GPIO pin [1].

From LPC18xx and LPC43xx User Manuals the GPIO controller consists of
the following blocks:
* GPIO pin interrupt block at 0x40087000, this change adds its support,
* GPIO GROUP0 interrupt block at 0x40088000,
* GPIO GROUP1 interrupt block at 0x40089000,
* GPIO port block at 0x400F4000, it is supported by the original driver.

While all 4 sub-controller blocks have their own I/O addresses, moreover
all 3 interrupt blocks are APB0 peripherals and high-speed GPIO block is
an AHB slave, according to the hardware manual the GPIO controller is
seen as a single block, and 4 sub-controllers have the shared reset signal
RGU #28 and clock to register interface CLK_CPU_GPIO on CCU1.

Likely support of two GPIO group interrupt blocks won't be added in short
term, because the mechanism to mask several interrupt sources is not well
defined.

[1] Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt
Signed-off-by: NVladimir Zapolskiy <vz@mleia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fix kconfig warning for GPIO_SNPS_CREG:

WARNING: unmet direct dependencies detected for OF_GPIO
  Depends on [n]: GPIOLIB [=y] && OF [=n] && HAS_IOMEM [=y]
  Selected by [y]:
  - GPIO_SNPS_CREG [=y] && GPIOLIB [=y] && HAS_IOMEM [=y] && (ARC || COMPILE_TEST [=y])

Drivers in drivers/gpio/Kconfig depend on OF_GPIO, not select it.
This prevents attempting to build when OF is not enabled.
Signed-off-by: NRandy Dunlap <rdunlap@infradead.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add single-register MMIO GPIO driver for complex cases where
only several fields in register belong to GPIO lines and each GPIO
line owns a field with different length and on/off value.

Such CREG GPIOs are used in Synopsys AXS10x and HSDK boards.
Signed-off-by: NEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver controls a SIOX device that provides 20 I/O lines. The first
twelve are fixed inputs, the remaining eight are outputs.
Acked-by: NGavin Schenk <g.schenk@eckelmann.de>
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The pinctrl-ingenic driver is now handling the GPIO chips directly.
Signed-off-by: NPaul Cercueil <paul@crapouillou.net>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

We can quite easily switch banks/ports A and B to use
GPIOLIB_IRQCHIP which is code that will be more careful
about handling interrupt descriptors and use a proper
irqdomain for translating the IRQs. This cuts down some
code in favor of using the implementation inside
gpiolib.
Acked-by: NAlexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Instead of open coding logic for reading and writing GPIO lines,
use the generic GPIO library. Also switch to using the spinlock
from the generic GPIO to protect the registers.

Cc: linux-snps-arc@lists.infradead.org
Acked-by: NChristian Ruppert <christian.ruppert@alitech.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This was tested on actual hardware and found to work fine, but currently
the official specifications of this chip could not be obtained to
confirm the numbers.
Signed-off-by: NLeonid Bloch <lbloch@janustech.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Compile-testing the driver fails unless OF_GPIO is enabled:

drivers/gpio/gpio-mt7621.c: In function 'mediatek_gpio_bank_probe':
drivers/gpio/gpio-mt7621.c:228:10: error: 'struct gpio_chip' has no member named 'of_node'

Fixes: 4ba9c3af ("gpio: mt7621: Add a driver for MT7621")
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add driver support for gpio of MT7621 SoC.
Signed-off-by: NSergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: NNeilBrown <neil@brown.name>
[Switched wording WIDTH to STRIDE]
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds support for the GPIOs on Cirrus Logic Madera class codecs.
Any pins not used for special functions (see the pinctrl driver) can be
used as general single-bit input or output lines. The number of available
GPIOs varies between codecs.

Note that this is part of a composite MFD for these codecs and can only
be used with the corresponding MFD and other child drivers on those
silicon. The GPIO block on these codecs does not exist indepedently of
the rest of the MFD.
Signed-off-by: NNariman Poushin <nariman@opensource.cirrus.com>
Signed-off-by: NRichard Fitzgerald <rf@opensource.cirrus.com>
Signed-off-by: NCharles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The new challenge is to remove VLAs from the kernel
(see https://lkml.org/lkml/2018/3/7/621) to eventually
turn on -Wvla.

Using a kmalloc array is the easy way to fix this but kmalloc is still
more expensive than stack allocation. Introduce a fast path with a
fixed size stack array to cover most chip with gpios below some fixed
amount. The slow path dynamically allocates an array to cover those
chips with a large number of gpios.
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: NPhil Reid <preid@electromag.com.au>
Reviewed-and-tested-by: NLukas Wunner <lukas@wunner.de>
Signed-off-by: NLukas Wunner <lukas@wunner.de>
Signed-off-by: NLaura Abbott <labbott@redhat.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Spreadtrum PMIC EIC controller contains only one bank of debounce EIC,
and this bank contains 16 EICs. Each EIC can only be used as input mode,
as well as supporting the debounce and the capability to trigger interrupts
when detecting input signals.
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Spreadtrum digital-chip EIC controller has 4 sub-modules: debounce EIC,
latch EIC, async EIC and sync EIC, and each sub-module can has multiple
banks and each bank contains 8 EICs.

Each EIC can only be used as input mode, and has the capability to trigger
interrupts when detecting input signals.
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The cris architecture is getting removed, so we no longer need the
etraxfs driver.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Commit 7ed91505 (gpio: raspberrypi-ext: fix firmware dependency)
fixed the Kconfig dependency to ensure that gpio-raspberrypi-exp is not
built-in when the firmware is a module. But the Kconfig syntax for doing
so is cryptic. Add a comment to make it a little easier.

Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Spreadtrum SC9860 platform GPIO controller contains 16 groups and
each group contains 16 GPIOs. Each GPIO can set input/output and has
the interrupt capability.
Signed-off-by: NBaolin Wang <baolin.wang@linaro.org>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>