1. 29 10月, 2016 2 次提交
  2. 14 10月, 2016 1 次提交
    • A
      drm/i915: Allocate intel_engine_cs structure only for the enabled engines · 3b3f1650
      Akash Goel 提交于
      With the possibility of addition of many more number of rings in future,
      the drm_i915_private structure could bloat as an array, of type
      intel_engine_cs, is embedded inside it.
      	struct intel_engine_cs engine[I915_NUM_ENGINES];
      Though this is still fine as generally there is only a single instance of
      drm_i915_private structure used, but not all of the possible rings would be
      enabled or active on most of the platforms. Some memory can be saved by
      allocating intel_engine_cs structure only for the enabled/active engines.
      Currently the engine/ring ID is kept static and dev_priv->engine[] is simply
      indexed using the enums defined in intel_engine_id.
      To save memory and continue using the static engine/ring IDs, 'engine' is
      defined as an array of pointers.
      	struct intel_engine_cs *engine[I915_NUM_ENGINES];
      dev_priv->engine[engine_ID] will be NULL for disabled engine instances.
      
      There is a text size reduction of 928 bytes, from 1028200 to 1027272, for
      i915.o file (but for i915.ko file text size remain same as 1193131 bytes).
      
      v2:
      - Remove the engine iterator field added in drm_i915_private structure,
        instead pass a local iterator variable to the for_each_engine**
        macros. (Chris)
      - Do away with intel_engine_initialized() and instead directly use the
        NULL pointer check on engine pointer. (Chris)
      
      v3:
      - Remove for_each_engine_id() macro, as the updated macro for_each_engine()
        can be used in place of it. (Chris)
      - Protect the access to Render engine Fault register with a NULL check, as
        engine specific init is done later in Driver load sequence.
      
      v4:
      - Use !!dev_priv->engine[VCS] style for the engine check in getparam. (Chris)
      - Kill the superfluous init_engine_lists().
      
      v5:
      - Cleanup the intel_engines_init() & intel_engines_setup(), with respect to
        allocation of intel_engine_cs structure. (Chris)
      
      v6:
      - Rebase.
      
      v7:
      - Optimize the for_each_engine_masked() macro. (Chris)
      - Change the type of 'iter' local variable to enum intel_engine_id. (Chris)
      - Rebase.
      
      v8: Rebase.
      
      v9: Rebase.
      
      v10:
      - For index calculation use engine ID instead of pointer based arithmetic in
        intel_engine_sync_index() as engine pointers are not contiguous now (Chris)
      - For appropriateness, rename local enum variable 'iter' to 'id'. (Joonas)
      - Use for_each_engine macro for cleanup in intel_engines_init() and remove
        check for NULL engine pointer in cleanup() routines. (Joonas)
      
      v11: Rebase.
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: NAkash Goel <akash.goel@intel.com>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Signed-off-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1476378888-7372-1-git-send-email-akash.goel@intel.com
      3b3f1650
  3. 12 10月, 2016 1 次提交
  4. 10 10月, 2016 2 次提交
  5. 07 10月, 2016 2 次提交
  6. 05 10月, 2016 1 次提交
  7. 21 9月, 2016 2 次提交
  8. 09 9月, 2016 4 次提交
    • C
      drm/i915: Drive request submission through fence callbacks · 5590af3e
      Chris Wilson 提交于
      Drive final request submission from a callback from the fence. This way
      the request is queued until all dependencies are resolved, at which
      point it is handed to the backend for queueing to hardware. At this
      point, no dependencies are set on the request, so the callback is
      immediate.
      
      A side-effect of imposing a heavier-irqsafe spinlock for execlist
      submission is that we lose the softirq enabling after scheduling the
      execlists tasklet. To compensate, we manually kickstart the softirq by
      disabling and enabling the bh around the fence signaling.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: NJohn Harrison <john.c.harrison@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20160909131201.16673-14-chris@chris-wilson.co.uk
      5590af3e
    • C
      drm/i915: Update reset path to fix incomplete requests · 821ed7df
      Chris Wilson 提交于
      Update reset path in preparation for engine reset which requires
      identification of incomplete requests and associated context and fixing
      their state so that engine can resume correctly after reset.
      
      The request that caused the hang will be skipped and head is reset to the
      start of breadcrumb. This allows us to resume from where we left-off.
      Since this request didn't complete normally we also need to cleanup elsp
      queue manually. This is vital if we employ nonblocking request
      submission where we may have a web of dependencies upon the hung request
      and so advancing the seqno manually is no longer trivial.
      
      ABI: gem_reset_stats / DRM_IOCTL_I915_GET_RESET_STATS
      
      We change the way we count pending batches. Only the active context
      involved in the reset is marked as either innocent or guilty, and not
      mark the entire world as pending. By inspection this only affects
      igt/gem_reset_stats (which assumes implementation details) and not
      piglit.
      
      ARB_robustness gives this guide on how we expect the user of this
      interface to behave:
      
       * Provide a mechanism for an OpenGL application to learn about
         graphics resets that affect the context.  When a graphics reset
         occurs, the OpenGL context becomes unusable and the application
         must create a new context to continue operation. Detecting a
         graphics reset happens through an inexpensive query.
      
      And with regards to the actual meaning of the reset values:
      
         Certain events can result in a reset of the GL context. Such a reset
         causes all context state to be lost. Recovery from such events
         requires recreation of all objects in the affected context. The
         current status of the graphics reset state is returned by
      
      	enum GetGraphicsResetStatusARB();
      
         The symbolic constant returned indicates if the GL context has been
         in a reset state at any point since the last call to
         GetGraphicsResetStatusARB. NO_ERROR indicates that the GL context
         has not been in a reset state since the last call.
         GUILTY_CONTEXT_RESET_ARB indicates that a reset has been detected
         that is attributable to the current GL context.
         INNOCENT_CONTEXT_RESET_ARB indicates a reset has been detected that
         is not attributable to the current GL context.
         UNKNOWN_CONTEXT_RESET_ARB indicates a detected graphics reset whose
         cause is unknown.
      
      The language here is explicit in that we must mark up the guilty batch,
      but is loose enough for us to relax the innocent (i.e. pending)
      accounting as only the active batches are involved with the reset.
      
      In the future, we are looking towards single engine resetting (with
      minimal locking), where it seems inappropriate to mark the entire world
      as innocent since the reset occurred on a different engine. Reducing the
      information available means we only have to encounter the pain once, and
      also reduces the information leaking from one context to another.
      
      v2: Legacy ringbuffer submission required a reset following hibernation,
      or else we restore stale values to the RING_HEAD and walked over
      stolen garbage.
      
      v3: GuC requires replaying the requests after a reset.
      
      v4: Restore engine IRQ after reset (so waiters will be woken!)
          Rearm hangcheck if resetting with a waiter.
      
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20160909131201.16673-13-chris@chris-wilson.co.uk
      821ed7df
    • C
      drm/i915: Expand bool interruptible to pass flags to i915_wait_request() · ea746f36
      Chris Wilson 提交于
      We need finer control over wakeup behaviour during i915_wait_request(),
      so expand the current bool interruptible to a bitmask.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20160909131201.16673-9-chris@chris-wilson.co.uk
      ea746f36
    • C
      drm/i915: Simplify ELSP queue request tracking · 70c2a24d
      Chris Wilson 提交于
      Emulate HW to track and manage ELSP queue. A set of SW ports are defined
      and requests are assigned to these ports before submitting them to HW. This
      helps in cleaning up incomplete requests during reset recovery easier
      especially after engine reset by decoupling elsp queue management. This
      will become more clear in the next patch.
      
      In the engine reset case we want to resume where we left-off after skipping
      the incomplete batch which requires checking the elsp queue, removing
      element and fixing elsp_submitted counts in some cases. Instead of directly
      manipulating the elsp queue from reset path we can examine these ports, fix
      up ringbuffer pointers using the incomplete request and restart submissions
      again after reset.
      
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/1470414607-32453-3-git-send-email-arun.siluvery@linux.intel.comReviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20160909131201.16673-6-chris@chris-wilson.co.uk
      70c2a24d
  9. 19 8月, 2016 1 次提交
  10. 17 8月, 2016 2 次提交
  11. 15 8月, 2016 5 次提交
  12. 10 8月, 2016 3 次提交
  13. 05 8月, 2016 1 次提交
    • C
      drm/i915: Enable i915_gem_wait_for_idle() without holding struct_mutex · dcff85c8
      Chris Wilson 提交于
      The principal motivation for this was to try and eliminate the
      struct_mutex from i915_gem_suspend - but we still need to hold the mutex
      current for the i915_gem_context_lost(). (The issue there is that there
      may be an indirect lockdep cycle between cpu_hotplug (i.e. suspend) and
      struct_mutex via the stop_machine().) For the moment, enabling last
      request tracking for the engine, allows us to do busyness checking and
      waiting without requiring the struct_mutex - which is useful in its own
      right.
      
      As a side-effect of having a robust means for tracking engine busyness,
      we can replace our other busyness heuristic, that of comparing against
      the last submitted seqno. For paranoid reasons, we have a semi-ordered
      check of that seqno inside the hangchecker, which we can now improve to
      an ordered check of the engine's busyness (removing a locked xchg in the
      process).
      
      v2: Pass along "bool interruptible" as being unlocked we cannot rely on
      i915->mm.interruptible being stable or even under our control.
      v3: Replace check Ironlake i915_gpu_busy() with the common precalculated value
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1470388464-28458-6-git-send-email-chris@chris-wilson.co.uk
      dcff85c8
  14. 04 8月, 2016 2 次提交
  15. 03 8月, 2016 11 次提交