1. 13 10月, 2014 1 次提交
    • N
      powerpc/numa: Add ability to disable and debug topology updates · 2d73bae1
      Nishanth Aravamudan 提交于
      We have hit a few customer issues with the topology update code (VPHN
      and PRRN). It would be nice to be able to debug the notifications coming
      from the hypervisor in both cases to the LPAR, as well as to disable
      responding to the notifications at boot-time, to narrow down the source
      of the problems. Add a basic level of such functionality, similar to the
      numa= command-line parameter. We already have a toggle in
      /proc/powerpc/topology_updates that allows run-time enabling/disabling,
      so the updates can be started at run-time if desired. But the bugs we've
      run into have occured during boot or very shortly after coming to login,
      and have resulted in a broken NUMA topology.
      Signed-off-by: NNishanth Aravamudan <nacc@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      2d73bae1
  2. 08 10月, 2014 1 次提交
  3. 07 10月, 2014 1 次提交
  4. 09 9月, 2014 1 次提交
  5. 08 9月, 2014 5 次提交
  6. 04 9月, 2014 1 次提交
    • A
      powerpc: fsl_pci: Add forced PCI Agent enumeration · 00406e87
      Aaron Sierra 提交于
      The following commit prevents the MPC8548E on the XPedite5200 PrPMC
      module from enumerating its PCI/PCI-X bus:
      
          powerpc/fsl-pci: use 'Header Type' to identify PCIE mode
      
      The previous patch prevents any Freescale PCI-X bridge from enumerating
      the bus, if it is hardware strapped into Agent mode.
      
      In PCI-X, the Host is responsible for driving the PCI-X initialization
      pattern to devices on the bus, so that they know whether to operate in
      conventional PCI or PCI-X mode as well as what the bus timing will be.
      For a PCI-X PrPMC, the pattern is driven by the mezzanine carrier it is
      installed onto. Therefore, PrPMCs are PCI-X Agents, but one per system
      may still enumerate the bus.
      
      This patch causes the device node of any PCI/PCI-X bridge strapped into
      Agent mode to be checked for the fsl,pci-agent-force-enum property. If
      the property is present in the node, the bridge will be allowed to
      enumerate the bus.
      
      Cc: Minghuan Lian <Minghuan.Lian@freescale.com>
      Signed-off-by: NAaron Sierra <asierra@xes-inc.com>
      Signed-off-by: NScott Wood <scottwood@freescale.com>
      00406e87
  7. 03 9月, 2014 2 次提交
  8. 30 8月, 2014 2 次提交
  9. 29 8月, 2014 1 次提交
  10. 28 8月, 2014 3 次提交
  11. 27 8月, 2014 1 次提交
  12. 26 8月, 2014 1 次提交
    • R
      ARM: OMAP2+: GPMC: Support Software ECC scheme via DT · a3e83f05
      Roger Quadros 提交于
      For v3.14 and prior, 1-bit Hamming code ECC via software was the
      default choice for some boards e.g. 3430sdp.
      Commit ac65caf5 in v3.15 changed the behaviour
      to use 1-bit Hamming code via Hardware using a different ECC layout
      i.e. (ROM code layout) than what is used by software ECC.
      
      This ECC layout change causes NAND filesystems created in v3.14
      and prior to be unusable in v3.15 and later. So don't mark "sw" scheme
      as deperecated and support it.
      Signed-off-by: NRoger Quadros <rogerq@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a3e83f05
  13. 21 8月, 2014 1 次提交
  14. 20 8月, 2014 2 次提交
  15. 16 8月, 2014 3 次提交
  16. 15 8月, 2014 1 次提交
  17. 14 8月, 2014 1 次提交
  18. 12 8月, 2014 2 次提交
  19. 11 8月, 2014 2 次提交
  20. 10 8月, 2014 4 次提交
  21. 09 8月, 2014 4 次提交