- 27 1月, 2020 6 次提交
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由 Michal Kalderon 提交于
Add to debug dump more information on the platform it was collected from (pci func, path id). Provide human readable reg fifo erros. Removed static debug arrays from HSI Functions, and move them to the hwfn. Some structures were slightly changed (removing reserved chip id for example) which lead to many long initializations being modified with one parameter less during initialization. This leads to some long diffs that don't really change anything. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
Part of the FW drop includes new debug capabilities implemented in the qed_debug file. This patch dumps additional information during ethtool -d for better debugging. The data dumped is the ilt (internal logical table) and information gathered by the management firmware incase there was a crash and driver was not able to extract the information (mdump). Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
This feature enables the FW to page out FW code when required Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
The number of BTB blocks was modified to be different between the two chip flavors supported (BB/K2) as a result, this lead to a re-write of selecting the default hsi value based on the chip. This patch creates a lookup table for hsi values per chip rather than ask again and again for every value. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
LL2 queues were a limited resource due to FW constraints. This FW introduced a new resource which is a context based ll2 queue (memory on host). The additional ll2 queues are required for RDMA SRIOV. The code refers to the previous ll2 queues as ram-based or legacy, and the new queues as ctx-based. This change decreased the "legacy" ram-based queues therefore the first ll2 queue used for iWARP was converted to the ctx-based ll2 queue. This feature also exposed a bug in the DIRECT_REG_WR64 macro implementation which didn't have an effect in other use cases. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
IRO stands for internal RAM offsets. Updating the FW binary produces different iro offsets. This file contains the different values, and a new representation of the values. Update the FW version Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 27 5月, 2019 2 次提交
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由 Michal Kalderon 提交于
The table currently contains a single parameter for configuring whether iWARP should be enabled on a 100g device. Enabling iWARP on a 100g device impacts L2 performance and is therefore not enabled by default. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Michal Kalderon 提交于
This patch refactors the current llh implementation. It exposes a hw resource called ppfid (port-pfid) and implements an API for configuring the resource. Default configuration which was used until now limited the number of filters per PF and did not support engine affinity per protocol. The new API enables allocating more filter rules per PF and enables affinitizing protocol packets to a certain engine which enables full 100g protocol offload support. Signed-off-by: NAriel Elior <ariel.elior@marvell.com> Signed-off-by: NMichal Kalderon <michal.kalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 15 4月, 2019 3 次提交
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由 Denis Bolotin 提交于
Separate the overflow handling from the hardware interrupt status analysis. The interrupt status is a single register and is common for all PFs. The first PF reading the register is not necessarily the one who overflowed. All PFs must check their overflow status on every attention. In this change we clear the sticky indication in the attention handler to allow doorbells to be processed again as soon as possible, but running the doorbell recovery is scheduled for the periodic handler to reduce the time spent in the attention handler. Checking the need for DORQ flush was changed to "db_bar_no_edpm" because qed_edpm_enabled()'s result could change dynamically and might have prevented a needed flush. Signed-off-by: NDenis Bolotin <dbolotin@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Denis Bolotin 提交于
When the DORQ (doorbell block) is overflowed, all PFs get attentions at the same time. If one PF finished handling the attention before another PF even started, the second PF might miss the DORQ's attention bit and not handle the attention at all. If the DORQ attention is missed and the issue is not resolved, another attention will not be sent, therefore each attention is treated as a potential DORQ attention. As a result, the attention callback is called more frequently so the debug print was moved to reduce its quantity. The number of periodic doorbell recovery handler schedules was reduced because it was the previous way to mitigating the missed attention issue. Signed-off-by: NDenis Bolotin <dbolotin@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Denis Bolotin 提交于
DB_REC_DRY_RUN (running doorbell recovery without sending doorbells) is never used. DB_REC_ONCE (send a single doorbell from the doorbell recovery) is not needed anymore because by running the periodic handler we make sure we check the overflow status later instead. This patch is needed because in the next patches, the only doorbell recovery type being used is DB_REC_REAL_DEAL, and the fixes are much cleaner without this enum. Signed-off-by: NDenis Bolotin <dbolotin@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 21 3月, 2019 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
The patch introduces a new Multi-Function bit for cases where firmware shouldn't perform the insertion of vlan-0 tag. The new bit is defined to abstract the implementation from the actual MF mode. Signed-off-by: NSudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 22 2月, 2019 1 次提交
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由 Sudarsana Reddy Kalluru 提交于
Read port count from the shared memory instead of driver deriving this value. This change simplifies the driver implementation and also avoids any dependencies for finding the port-count. Signed-off-by: NSudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: NMichal Kalderon <mkalderon@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 2月, 2019 1 次提交
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由 Manish Chopra 提交于
Version update for qed/qede modules. Signed-off-by: NManish Chopra <manishc@marvell.com> Signed-off-by: NAriel Elior <aelior@marvell.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 29 1月, 2019 2 次提交
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由 Tomer Tayar 提交于
This patch adds the detection and handling of a parity error ("process kill event"), including the update of the protocol drivers, and the prevention of any HW access that will lead to device access towards the host while recovery is in progress. It also provides the means for the protocol drivers to trigger a recovery process on their decision. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Initiating final cleanup after an ungraceful driver unload can lead to bad PCI accesses towards the host. This patch revises the load sequence so final cleanup is sent while the internal master enable is cleared, to prevent the host accesses, and clears the internal error indications just before enabling the internal master enable. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 1月, 2019 1 次提交
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由 David S. Miller 提交于
This is new code and not bug fixes. This reverts all changes added by merge commit 8fb18be9Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 1月, 2019 2 次提交
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由 Tomer Tayar 提交于
This patch adds the detection and handling of a parity error ("process kill event"), including the update of the protocol drivers, and the prevention of any HW access that will lead to device access towards the host while recovery is in progress. It also provides the means for the protocol drivers to trigger a recovery process on their decision. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Initiating final cleanup after an ungraceful driver unload can lead to bad PCI accesses towards the host. This patch revises the load sequence so final cleanup is sent while the internal master enable is cleared, to prevent the host accesses, and clears the internal error indications just before enabling the internal master enable. Signed-off-by: NTomer Tayar <tomer.tayar@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 12月, 2018 2 次提交
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由 Ariel Elior 提交于
In case of an attention from the doorbell queue block, analyze the HW indications. In case of a doorbell overflow, execute a doorbell recovery. Since there can be spurious indications (race conditions between multiple PFs), schedule a periodic task for checking whether a doorbell overflow may have been missed. After a set time with no indications, terminate the periodic task. Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Ariel Elior 提交于
Add the database used to register doorbelling entities, and APIs for adding and deleting entries, and logic for traversing the database and doorbelling once on behalf of all entities. Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 10月, 2018 1 次提交
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由 Rahul Verma 提交于
Align the use of local PTT to propagate through the qed_mcp* API's. Global ptt should not be used. Register access should be done through layers. Register address is mapped into a PTT, PF translation table. Several interface functions require a PTT to direct read/write into register. There is a pool of PTT maintained, and several PTT are used simultaneously to access device registers in different flows. Same PTT should not be used in flows that can run concurrently. To avoid running out of PTT resources, too many PTT should not be acquired without releasing them. Every PF has a global PTT, which is used throughout the life of PF, in most important flows for register access. Generic functions acquire the PTT locally and release after the use. This patch aligns the use of Global PTT and Local PTT accordingly. Signed-off-by: NRahul Verma <rahul.verma@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 06 9月, 2018 1 次提交
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由 Denis Bolotin 提交于
This patch adds a new qed firmware with fixes and support for new features. Fixes: - Fix a rare case of device crash with iWARP, iSCSI or FCoE offload. - Fix GRE tunneled traffic when iWARP offload is enabled. - Fix RoCE failure in ib_send_bw when using inline data. - Fix latency optimization flow for inline WQEs. - BigBear 100G fix RDMA: - Reduce task context size. - Application page sizes above 2GB support. - Performance improvements. ETH: - Tenant DCB support. - Replace RSS indirection table update interface. Misc: - Debug Tools changes. Signed-off-by: NDenis Bolotin <denis.bolotin@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 8月, 2018 2 次提交
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由 Denis Bolotin 提交于
RoCE qps use a pair of physical queues (pq) received from the Queue Manager (QM) - an offload queue (OFLD) and a low latency queue (LLT). The QM block creates a pq for each TC, and allows RoCE qps to ask for a pq with a specific TC. As a result, qps with different VLAN priorities can be mapped to different TCs, and employ features such as PFC and ETS. Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDenis Bolotin <denis.bolotin@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Denis Bolotin 提交于
Distinguish not set offload_tc from offload_tc 0 and add getters and setters. Signed-off-by: NMichal Kalderon <michal.kalderon@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDenis Bolotin <denis.bolotin@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 7月, 2018 1 次提交
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由 Denis Bolotin 提交于
Configuration information read at driver load can become stale after it is updated. Mark information as not valid and re-populate when this happens. Signed-off-by: NDenis Bolotin <denis.bolotin@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 5月, 2018 2 次提交
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由 Sudarsana Reddy Kalluru 提交于
MFW requests the TLVs in interrupt context. Extracting of the required data from upper layers and populating of the TLVs require process context. The patch adds work-queues for processing the tlv requests. It also adds the implementation for requesting the tlv values from appropriate protocol driver. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sudarsana Reddy Kalluru 提交于
The patch adds driver support for processing TLV requests/repsonses from the mfw and upper driver layers respectively. The implementation reads the requested TLVs from the shared memory, requests the values from upper layer drivers, populates this info (TLVs) shared memory and notifies MFW about the TLV values. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 5月, 2018 2 次提交
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由 Sudarsana Reddy Kalluru 提交于
This patch adds driver changes for supporting the Unified Fabric Port (UFP). This is a new paritioning mode wherein MFW provides the set of parameters to be used by the device such as traffic class, outer-vlan tag value, priority type etc. Drivers receives this info via notifications from mfw and configures the hardware accordingly. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sudarsana Reddy Kalluru 提交于
`mf_mode' field indicates the multi-partitioning mode the device is configured to. This method doesn't scale very well, adding a new MF mode requires going over all the existing conditions, and deciding whether those are needed for the new mode or not. The patch defines a set of bit-fields for modes which are derived according to the mode info shared by the MFW and all the configuration would be made according to those. To add a new mode, there would be a single place where we'll need to go and choose which bits apply and which don't. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 30 3月, 2018 2 次提交
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由 Sudarsana Reddy Kalluru 提交于
This patch adds APIs for flash access. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Sudarsana Reddy Kalluru 提交于
This patch adds support for populating the flash image attributes. Signed-off-by: NSudarsana Reddy Kalluru <Sudarsana.Kalluru@cavium.com> Signed-off-by: NAriel Elior <ariel.elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 1月, 2018 3 次提交
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由 Tomer Tayar 提交于
Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NChad Dupuis <Chad.Dupuis@cavium.com> Signed-off-by: NManish Rangankar <Manish.Rangankar@cavium.com> Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
Advance the qed* drivers to use firmware 8.33.1.0: Modify core driver (qed) to utilize the new FW and initialize the device with it. This is the lion's share of the patch, and includes changes to FW interface files, device initialization flows, FW interaction flows, and debug collection flows. Modify Ethernet driver (qede) to make use of new FW in fastpath. Modify RoCE/iWARP driver (qedr) to make use of new FW in fastpath. Modify FCoE driver (qedf) to make use of new FW in fastpath. Modify iSCSI driver (qedi) to make use of new FW in fastpath. Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NYuval Bason <Yuval.Bason@cavium.com> Signed-off-by: NRam Amrani <Ram.Amrani@cavium.com> Signed-off-by: NManish Chopra <Manish.Chopra@cavium.com> Signed-off-by: NChad Dupuis <Chad.Dupuis@cavium.com> Signed-off-by: NManish Rangankar <Manish.Rangankar@cavium.com> Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Tomer Tayar 提交于
This patch refactors and reorders the FW API files in preparation of upgrading the code to support new FW. - Make use of the BIT macro in appropriate places. - Whitespace changes to align values and code blocks. - Comments are updated (spelling mistakes, removed if not clear). - Group together code blocks which are related or deal with similar matters. Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NTomer Tayar <Tomer.Tayar@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 7月, 2017 3 次提交
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由 Kalderon, Michal 提交于
This patch implements the passive side connect. It addresses pre-allocating resources, creating a connection element upon valid SYN packet received. Calling upper layer and implementation of the accept/reject calls. Error handling is not part of this patch. Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kalderon, Michal 提交于
Make some names more generic as they will be used by iWARP too. Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Kalderon, Michal 提交于
iWARP personality introduced the need for differentiating in several places in the code whether we are RoCE, iWARP or either. This leads to introducing new macros for querying the personality. Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NAriel Elior <Ariel.Elior@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 10 6月, 2017 1 次提交
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由 Michal Kalderon 提交于
LL2 today is interrupt driven - when tx/rx completion arrives [or any other indication], qed needs to operate on the connection and pass the information to the protocol-driver [or internal qed consumer]. Since we have several flavors of ll2 employeed by the driver, each handler needs to do an if-else to determine the right functionality to use based on the connection type. In order to make things more scalable [given that we're going to add additional types of ll2 flavors] move the infrastrucutre into using a callback-based approach - the callbacks would be provided as part of the connection's initialization parameters. Signed-off-by: NMichal Kalderon <Michal.Kalderon@cavium.com> Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 6月, 2017 1 次提交
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由 Mintz, Yuval 提交于
VFs are currently not mapping their doorbell bar, instead relying on the small doorbell window they have in their limited regview bar. In order to increase the number of possible Tx connections [queues] employeed by VF past 16, we need to start using the doorbell bar if one such is exposed - VF would communicate this fact to PF which would return the size-bar internally configured into chip, according to which the VF would decide whether to actually utilize the doorbell bar. Signed-off-by: NYuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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