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  1. 12 9月, 2013 8 次提交
  3. 10 9月, 2013 1 次提交
  5. 06 9月, 2013 2 次提交
  7. 05 9月, 2013 2 次提交
  9. 04 9月, 2013 1 次提交
  11. 03 9月, 2013 1 次提交
  13. 31 8月, 2013 1 次提交
  15. 29 8月, 2013 2 次提交
    • J
      Input: MAINTAINERS - change maintainer for cyttsp driver · be9a6f40
      由 Javier Martinez Canillas 提交于 
      I haven't had time to work on this driver for a long time and
Ferruh has been doing a great job making it more generic,
adding support for new hardware and providing bug fixes.

So, let's make MAINTAINERS reflect reality and add him as the
cyttsp maintainer instead of me.

Also, since Ferruh works for Cypress, we may change the driver
status from Maintained to Supported.
Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org>
Acked-by: NFerruh Yigit <fery@cypress.com>
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
      be9a6f40
    • L
      cpuidle: big.LITTLE: vexpress-TC2 CPU idle driver · 14d2c34c
      由 Lorenzo Pieralisi 提交于 
      The big.LITTLE architecture is composed of two clusters of cpus. One cluster
contains less powerful but more energy efficient processors and the other
cluster groups the powerful but energy-intensive cpus.

The TC2 testchip implements two clusters of CPUs (A7 and A15 clusters in
a big.LITTLE configuration) connected through a CCI interconnect that manages
coherency of their respective L2 caches and intercluster distributed
virtual memory messages (DVM).

TC2 testchip integrates a power controller that manages cores resets, wake-up
IRQs and cluster low-power states. Power states are managed at cluster
level, which means that voltage is removed from a cluster iff all cores
in a cluster are in a wfi state. Single cores can enter a reset state
which is identical to wfi in terms of power consumption but simplifies the
way cluster states are entered.

This patch provides a multiple driver CPU idle implementation for TC2
which paves the way for a generic big.LITTLE idle driver for all
upcoming big.LITTLE based systems on chip.

The driver relies on the MCPM infrastructure to coordinate and manage
core power states; in particular MCPM allows to suspend specific cores
and hides the CPUs coordination required to shut-down clusters of CPUs.

Power down sequences for the respective clusters are implemented in the
MCPM TC2 backend, with all code needed to clean caches and exit coherency.

The multiple driver CPU idle infrastructure allows to define different
C-states for big and little cores, determined at boot by checking the
part id of the possible CPUs and initializing the respective logical
masks in the big and little drivers.

Current big.little systems are composed of A7 and A15 clusters, as
implemented in TC2, but in the future that may change and the driver
will have evolve to retrieve what is a 'big' cpu and what is a 'little'
cpu in order to build the correct topology.

Cc: Kevin Hilman <khilman@linaro.org>
Cc: Amit Kucheria <amit.kucheria@linaro.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>
      14d2c34c
  17. 27 8月, 2013 1 次提交
  19. 26 8月, 2013 1 次提交
  21. 24 8月, 2013 2 次提交
  23. 22 8月, 2013 1 次提交
  25. 21 8月, 2013 2 次提交
  27. 20 8月, 2013 1 次提交
  29. 17 8月, 2013 2 次提交
  31. 15 8月, 2013 1 次提交
  33. 14 8月, 2013 4 次提交
  35. 13 8月, 2013 1 次提交
  37. 12 8月, 2013 2 次提交
  39. 11 8月, 2013 1 次提交
  41. 10 8月, 2013 1 次提交
  43. 09 8月, 2013 2 次提交