This patch removes direct reference of gpmc address from generic nand platform code.
Nand platform code now uses wrapper functions which are implemented in gpmc module.
Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

few functions added in gpmc module and to be used by other drivers like NAND.
Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

OMAP3530 CBB package can have GPIO126 muxed on 2 pins: mmc1_dat4 and
cam_strobe. This causes a problem with current multipath GPIO mux
handling, which muxes both pins as GPIO126 and makes the GPIO unusable.

Fix this by not muxing any pins if multipath GPIO is detected and
just print a warning instead. It's up to board files to set correct
mux using omap_mux_init_signal and pin name.
Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The devkit8000 boards often come with empty EEPROM thus without
valid ethernet MAC address. The DIE id to MAC formula is copied from
u-boot.
Signed-off-by: NKan-Ru Chen <kanru@0xlab.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Signed-off-by: NKan-Ru Chen <kanru@0xlab.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Allow DIE id to be get and used by others.
Signed-off-by: NKan-Ru Chen <kanru@0xlab.org>
Signed-off-by: NTony Lindgren <tony@atomide.com>

AM3505/3517 doesn't have IO wakeup capability, so we do not need to set
the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register
PM_WKEN_WKUP when the system enters suspend state.

Tested on AM3517EVM and OMAP3530EVM.
Signed-off-by: NStanley.Miao <stanley.miao@windriver.com>
Acked-by: NKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Omap DMA controller can prefetch data in advance in case of
destination synchronized data transfer. This may increase
performance when target HW block doesn't have fifo.
Data is waiting for transfer request in DMA fifo instead of read from memory.
Signed-off-by: NSamu Onkalo <samu.p.onkalo@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

omap24xx_check_revision, omap3_check_features,
omap3_check_revision, omap4_check_revision, omap3_cpuinfo
are not used elsewhere, it should be static

Also fixes the following sparse warnings:
arch/arm/mach-omap2/id.c:105:13: warning: symbol 'omap24xx_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:167:13: warning: symbol 'omap3_check_features'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:189:13: warning: symbol 'omap3_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:270:13: warning: symbol 'omap4_check_revision'
was not declared. Should it be static?
arch/arm/mach-omap2/id.c:300:13: warning: symbol 'omap3_cpuinfo'
was not declared. Should it be static?
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The original patch got truncated when applied from patchwork.kernel.org
as discussed at:

http://www.mail-archive.com/linux-omap@vger.kernel.org/msg28953.html

This patch supplies the missing chunks.
Signed-off-by: NSteve Sakoman <sakoman@gmail.com>
[tony@atomide.com: added more info to the patch description]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Fix GPIO numbers and smc91x for 2430sdp. The earlier code
had cut and paste errors from 3430sdp code. Also, 2430
has five GPIO banks for a total of 160 GPIO lines.
Signed-off-by: NTony Lindgren <tony@atomide.com>

This change adds in the necessary clocks and mux pins for UART
control on omap7xx devices.  I also made a change in the serial
code to only try and initialize two UARTs in omap_serial_init, as
these devices don't have three.
Signed-off-by: NCory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Recent DEBUG_LL and uncompress.h changes removed the check_port()
as pointed out by Cory Maccarrone <darkstar6262@gmail.com>.

This causes some boards to not boot, so add back the MDR1 register
check. The MDR1 register tells the mode of omap uart. Based on
an earlier patch by Cory Maccarrone <darkstar6262@gmail.com>.
Tested-by: NCory Maccarrone <darkstar6262@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds cpu hotplug support for OMAP4430. Only CPU inactive
state is supported as a low power state in the basic hot-plug support
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds a secure API to read AuxCoreBoot0 register to
check the cpu boot status. It also moves the other smc APIs
to common omap44xx-smc.S. This APIs should not be marked as
__INIT because we need these to be present for CPU hotplug
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds support for basic suspend doing a CPUx wfi
for OMAP4. All powerdomains are for now are kept programmed
in ON state.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Errata i202 (OMAP3430 - 1.12, OMAP3630 - 1.6):
UART module MDR1 register access can cause a dummy underrun
condition which could result in a freeze in the case of IrDA
communication or if used as UART, corrupted data.

Workaround is as follows for everytime MDR1 register is changed:
* setup all required UART registers
* setup MDR1.MODE_SELECT bit field
* Wait 5 L4 clk cycles + 5 UART functional clock cycles
* Clear the Tx and RX fifo using FCR register

Note: The following step is not done as I am assuming it is not
needed due to reconfiguration being done and there is no halted
operation perse.
* Read if required, the RESUME register to resume halted operation

Based on an earlier patch at:
http://git.omapzoom.org/?p=kernel/omap.git;a=commitdiff;h=42d4a342c009bd9727c100abc8a4bc3063c22f0cSigned-off-by: NDeepak K <deepak.k@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

introduce silicon specific quirks as a errata handling mechanism

as a start UART_ERRATA_FIFO_FULL_ABORT is used to handle the override
for fifo full condition for rx and tx.
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Remove the following sparse warnings by declaring attr as static:
arch/arm/mach-omap2/serial.c:627:1: warning: symbol 'dev_attr_sleep_timeout'
was not declared. Should it be static?
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Initialization of pointer should be done with NULL. Removes sparse
warnings:
arch/arm/mach-omap2/serial.c:566:17: warning: Using plain integer as NULL pointer
arch/arm/mach-omap2/serial.c:567:17: warning: Using plain integer as NULL pointer
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Adds context save/restore for mcr register as state of mcr register
is lost after core off.
Signed-off-by: NGovindraj R <govindraj.raja@ti.com>
Signed-off-by: NNishanth Menon <nm@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add initial support for the OMAP4 based Panda Board.
Signed-off-by: NDavid Anders <x0132446@ti.com>
[tony@atomide.com: selected board by default in Kconfig]
Signed-off-by: NTony Lindgren <tony@atomide.com>

This patch adds support for GPIO LEDs present on OMAP4
SDP and Blaze boards. This basically adds platform data
required by leds-gpio driver
Signed-off-by: NHemanth V <hemanthv@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Adding board configuration for the tmp105
temperature sensor. The interface to the sensor
is I2C.
Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The MMC1 and MMC2 cards have seperate LDO supplies. Current code assumes
that they are powered by same LDO.

This patch fixes the same and has VAUX1 as supply to MMC2 card.
Signed-off-by: NRajendra Nayak <rnayak@ti.com>
Signed-off-by: NSukumar Ghorai <s-ghorai@ti.com>
Signed-off-by: NKishore Kadiyala <kishore.kadiyala@ti.com>
Tested-by: NKishore Kadiyala <kishore.kadiyala@ti.com>
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

This commit will enable usage of tsl2563 ambient light sensor on Nokia N900.
Signed-off-by: NAmeya Palande <ameya.palande@nokia.com>
Signed-off-by: NMathias Nyman <mathias.nyman@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

With these and upcoming change to tpa6130a2 driver it's possible to add
support for the TPA6130A2 headphone amplifier.
Signed-off-by: NJarkko Nikula <jhnikula@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

There is REGULATOR_SUPPLY macro available for initializing the struct
regulator_consumer_supply so use it where applicable (all other supplies
than vdds_sdi) as it improves the readability.
Signed-off-by: NJarkko Nikula <jhnikula@gmail.com>
Acked-by: NEduardo Valentin <eduardo.valentin@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Proper operation of the tlv320aic3x audio codec requires that reset
sequencing is done in pair with supply voltages when using the regulator
framework. Add the codec reset gpio used in Nokia RX51 to tlv320aic3x
data.
Signed-off-by: NJarkko Nikula <jhnikula@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

It seems that the battery cover sensor in Nokia N900 is powered from the
V28 domain. Now if this regulator is disabled it causes that the gpio 160
reads only zero which effectively causes uSD removal detection.

Currently the bootloader enabled V28 is kept on but this may change in the
future according to comment in
drivers/regulator/core.c: regulator_has_full_constraints.

Also if there are any consumers on the V28 domain doing regulator_enable
regulator_disable cycle the V28 will be disabled after that.

Prepare for these by defining the V28 as always_on regulator.
Signed-off-by: NJarkko Nikula <jhnikula@gmail.com>
Cc: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add platform data for NAND and wifi, also setup all GPIOs
needed to use the wifi chip.
Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Update gpio-keys setup so it matches what is on default firmware.
Also make use of debounce feature in gpio-keys instead of setting it
explicitly, as gpio-keys is now capable of using hardware debounce on
OMAPs thanks to recent gpiolib changes.
Also fix a sparce warning along the way.
Signed-off-by: NGrazvydas Ignotas <notasas@gmail.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add board muxing to support the wlan wl1271 chip that is
hardwired to mmc2 (third mmc controller) on the ZOOM3.
Signed-off-by: NOhad Ben-Cohen <ohadb@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add board muxing to support the wlan wl1271 chip that is
hardwired to mmc2 (third mmc controller) on the ZOOM2.
Signed-off-by: NOhad Ben-Cohen <ohadb@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

__sa1111_remove always frees its argument, so the subsequent reference to
sachip->saved_state represents a use after free.  __sa1111_remove does not
appear to use the saved_state field, so the patch simply frees it first.

A simplified version of the semantic patch that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
expression E,E2;
@@

__sa1111_remove(E)
...
(
  E = E2
|
* E
)
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The MMC card detection sense has become really confused with negations
at various levels, leading to some platforms not detecting inserted
cards.  Fix this by converting everything to positive logic throughout,
thereby getting rid of these negations.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

smp_processor_id() must not be called from a preemptible context (this
is checked by CONFIG_DEBUG_PREEMPT).  kmap_high_l1_vipt() was doing so.
This lead to a problem where the wrong per_cpu kmap_high_l1_vipt_depth
could be incremented, causing a BUG_ON(*depth <= 0); in
kunmap_high_l1_vipt().

The solution is to move the call to smp_processor_id() after the call
to preempt_disable().

Originally by: Andrew Howe <ahowe@nvidia.com>
Signed-off-by: NGary King <gking@nvidia.com>
Acked-by: NNicolas Pitre <nico.as.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The ioread/iowrite accessors also need barriers as they're used in
place of readl/writel et.al. in portable drivers.  Create __iormb()
and __iowmb() which are conditionally defined to be barriers dependent
on ARM_DMA_MEM_BUFFERABLE, and always use these macros in the accessors.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

When the coherent DMA buffers are mapped as Normal Non-cacheable
(ARM_DMA_MEM_BUFFERABLE enabled), buffer accesses are no longer ordered
with Device memory accesses causing failures in device drivers that do
not use the mandatory memory barriers before starting a DMA transfer.
LKML discussions led to the conclusion that such barriers have to be
added to the I/O accessors:

http://thread.gmane.org/gmane.linux.kernel/683509/focus=686153
http://thread.gmane.org/gmane.linux.ide/46414
http://thread.gmane.org/gmane.linux.kernel.cross-arch/5250

This patch introduces a wmb() barrier to the write*() I/O accessors to
handle the situations where Normal Non-cacheable writes are still in the
processor (or L2 cache controller) write buffer before a DMA transfer
command is issued. For the read*() accessors, a rmb() is introduced
after the I/O to avoid speculative loads where the driver polls for a
DMA transfer ready bit.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This patch is in preparation for a subsequent patch which adds barriers
to the I/O accessors. Since the mandatory barriers may do an L2 cache
sync, this patch avoids a recursive call into l2x0_cache_sync() via the
write*() accessors and wmb() and a call into l2x0_cache_sync() with the
l2x0_lock held.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>