This patch splits EXYNOS4 clock code to EXYNOS4 common,
EXYNOS4210 and EXYNOS4212 for supporting new EXYNOS4212
SoC with one kernel image. Of course, this patch adds
some clock codes for EXYNOS4212 SoC.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The PLL4650C is used for VPLL on EXYNOS4 so should be fixed.
Signed-off-by: NJonghwan Choi <jhbird.choi@samsung.com>
[kgene.kim@samsung.com: added message]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NJonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210:
 - clock support
 - memory mapping and reserving
 - s5p_device_mfc platform device
Signed-off-by: NKamil Debski <k.debski@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

According to SoC name, EXYNOS4, this patch changes devname
for FIMD from 's5pv310-fb' to 'exynos4-fb'.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
[kgene.kim@samsung.com: removed to change wrong clock name]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

According to SoC name, EXYNOS4, this patch changes devname
for FIMD from 's5pv310-fb' to 'exynos4-fb'.
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
[kgene.kim@samsung.com: removed to change wrong clock name]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
[kgene.kim@samsung.com: removed changes of mach-exynos4/time.c]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch includes the implementation of the clock gating
for System MMU. Initially, all System MMUs are not asserted
the system clock. Asserting the system clock to a System MMU
is enabled only when s5p_sysmmu_enable() is called. Likewise,
it is disabled only when s5p_sysmmu_disable() is called.
Therefore, clock gating on System MMUs are still invisible to
the outside of the System MMU driver.
Signed-off-by: NKyongHo Cho <pullip.cho@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The keypad IF on EXYNOS4 uses 100MHz from PERIR functional
block for clocks, this patch updates the same.
Signed-off-by: NNaveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adds the device definitions, platform specific initialization
and clocks for SATA on ARMLEX4210.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds the parent clock for watchdog timer for EXYNOS4.
Signed-off-by: NInderpal Singh <inderpal.s@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch updates Clock part of EXYNOS4 according to the change of
ARCH name, EXYNOS4.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Define missing controller clocks for the I2S-0, 1 and 2 blocks.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: Added description]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Define clock for the AC97 controller.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Define PDMA clocks for the controller 0 and 1.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

FOUT APLL clock is used as a source of ARM core clock. So we need that the
clock source can be changed dynamically by using CPUFREQ driver. This patch
can give correct frequency when calling clk_get_rate() function.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NSangwook Ju <sw.ju@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds CMU(Clock Management Unit) registers for S5PV310/S5PC210
CPUFREQ driver and modifies some register names according to datasheet.
Signed-off-by: NSunyoung Kang <sy0816.kang@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support RTC for S5PV310 and S5PC210.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NJemings Ko <jemings@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch fixes source clocks of moutcore.
That should be clk_mout_apll instead of clk_sclk_apll.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds various special clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds video clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds various clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds SDMMC clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds enable and ctrlbit for struct clksrc_clk clk_vpllsrc
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds log messages of aclk_200, aclk_100, aclk_160, and
aclk_133. And adds clk_p.rate from calculated aclk_100.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds struct clk clk_sclk_usbphy0, _usbphy1, and _hdmiphy
for adding member of clkset_group_list.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds 'clkset_aclk' to use commonly. And removed struct
clksrc_sources clkset_aclk_200, clkset_aclk_100, clkset_aclk_160,
and clkset_aclk_133.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This pach removed unused clock on S5PV310/S5PC210.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch fixes on enable and ctrlbit of uclk1 and sclk_pwm.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds missed uart clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds clk_sclk_apll so that fixes on clk_mout_apll.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch fixes on PLL setting for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds clock and pll support for S5PV310.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>