1. 01 7月, 2020 2 次提交
  2. 24 6月, 2020 4 次提交
    • R
      cxgb4: always sync access when flashing PHY firmware · 5fff701c
      Rahul Lakkireddy 提交于
      Access to on-chip memory for flashing PHY firmware must always
      be synchronized. So, ensure the callers take on-chip memory lock.
      
      Also fixes following sparse warning:
      sge.c:1641:26: warning: context imbalance in 't4_load_phy_fw' -
      different lock contexts for basic block
      
      Fixes: 01b69614 ("cxgb4: Add PHY firmware support for T420-BT cards")
      Fixes: 4ee339e1 ("cxgb4: add support to flash PHY image")
      Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5fff701c
    • R
      cxgb4: update kernel-doc line comments · 29bbf5d7
      Rahul Lakkireddy 提交于
      Update several kernel-doc line comments to fix warnings reported by
      make W=1.
      
      Fixes following class of warnings reported by make W=1 in several
      places:
      l2t.c:616: warning: Cannot understand  * @dev: net_device pointer
      t4_hw.c:3175: warning: Function parameter or member 'adap' not
      described in 't4_get_exprom_version'
      t4_hw.c:3175: warning: Excess function parameter 'adapter' description
      in 't4_get_exprom_version'
      
      Fixes: 56d36be4 ("cxgb4: Add HW and FW support code")
      Fixes: fd3a4790 ("cxgb4: Add packet queues and packet DMA code")
      Fixes: 26f7cbc0 ("cxgb4: Don't attempt to upgrade T4 firmware when cxgb4 will end up as a slave")
      Fixes: 793dad94 ("RDMA/cxgb4: Fix bug for active and passive LE hash collision path")
      Fixes: ba3f8cd5 ("cxgb4: Add support in cxgb4 to get expansion rom version via ethtool")
      Fixes: f7502659 ("cxgb4: Add API to alloc l2t entry; also update existing ones")
      Fixes: ddc7740d ("cxgb4: Decode link down reason code obtained from firmware")
      Fixes: 193c4c28 ("cxgb4: Update T6 Buffer Group and Channel Mappings")
      Fixes: 8f46d467 ("cxgb4: Use Firmware params to get buffer-group map")
      Fixes: a4569504 ("cxgb4: time stamping interface for PTP")
      Fixes: 9c33e420 ("cxgb4: Add PTP Hardware Clock (PHC) support")
      Fixes: c3168cab ("cxgb4/cxgbvf: Handle 32-bit fw port capabilities")
      Fixes: 5ccf9d04 ("cxgb4: update API for TP indirect register access")
      Fixes: 3bdb376e ("cxgb4: introduce SMT ops to prepare for SMAC rewrite support")
      Fixes: 736c3b94 ("cxgb4: collect egress and ingress SGE queue contexts")
      Fixes: f56ec676 ("cxgb4: Add support for ethtool i2c dump")
      Fixes: 9d5fd927 ("cxgb4/cxgb4vf: add support for ndo_set_vf_vlan")
      Fixes: 98f3697f ("cxgb4: add tc flower match support for tunnel VNI")
      Fixes: 02d805dc ("cxgb4: use new fw interface to get the VIN and smt index")
      Fixes: 3f8cfd0d ("cxgb4/cxgb4vf: Program hash region for {t4/t4vf}_change_mac()")
      Fixes: d429005f ("cxgb4/cxgb4vf: Add support for SGE doorbell queue timer")
      Fixes: 0e395b3c ("cxgb4: add FLOWC based QoS offload")
      Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      29bbf5d7
    • R
      cxgb4: fix set but unused variable when DCB is disabled · 00e31cfc
      Rahul Lakkireddy 提交于
      Remove the set but unused variable when DCB is disabled. Instead,
      do the calculation directly inline.
      
      Fixes following warning in make W=1:
      cxgb4_main.c: In function 'cfg_queues':
      cxgb4_main.c:5380:29: warning: variable 'n1g' set but not used
      [-Wunused-but-set-variable]
        u32 i, n10g = 0, qidx = 0, n1g = 0;
                                   ^
      
      Fixes: 116ca924 ("cxgb4: fix checks for max queues to allocate")
      Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      00e31cfc
    • R
      cxgb4: fix endian conversions for L4 ports in filters · 63b53b0b
      Rahul Lakkireddy 提交于
      The source and destination L4 ports in filter offload need to be
      in CPU endian. They will finally be converted to Big Endian after
      all operations are done and before giving them to hardware. The
      L4 ports for NAT are expected to be passed as a byte stream TCB.
      So, treat them as such.
      
      Fixes following sparse warnings in several places:
      cxgb4_tc_flower.c:159:33: warning: cast from restricted __be16
      cxgb4_tc_flower.c:159:33: warning: incorrect type in argument 1 (different
      base types)
      cxgb4_tc_flower.c:159:33:    expected unsigned short [usertype] val
      cxgb4_tc_flower.c:159:33:    got restricted __be16 [usertype] dst
      
      Fixes: dca4faeb ("cxgb4: Add LE hash collision bug fix path in LLD driver")
      Fixes: 62488e4b ("cxgb4: add basic tc flower offload support")
      Fixes: 557ccbf9 ("cxgb4: add tc flower support for L3/L4 rewrite")
      Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      63b53b0b
  3. 20 6月, 2020 2 次提交
  4. 02 6月, 2020 1 次提交
    • R
      cxgb4/chcr: Enable ktls settings at run time · a3ac249a
      Rohit Maheshwari 提交于
      Current design enables ktls setting from start, which is not
      efficient. Now the feature will be enabled when user demands
      TLS offload on any interface.
      
      v1->v2:
      - taking ULD module refcount till any single connection exists.
      - taking rtnl_lock() before clearing tls_devops.
      
      v2->v3:
      - cxgb4 is now registering to tlsdev_ops.
      - module refcount inc/dec in chcr.
      - refcount is only for connections.
      - removed new code from cxgb_set_feature().
      
      v3->v4:
      - fixed warning message.
      Signed-off-by: NRohit Maheshwari <rohitm@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a3ac249a
  5. 23 5月, 2020 1 次提交
  6. 16 5月, 2020 2 次提交
  7. 02 4月, 2020 2 次提交
  8. 04 3月, 2020 2 次提交
  9. 19 1月, 2020 1 次提交
    • R
      cxgb4: fix Tx multi channel port rate limit · c856e2b6
      Rahul Lakkireddy 提交于
      T6 can support 2 egress traffic management channels per port to
      double the total number of traffic classes that can be configured.
      In this configuration, if the class belongs to the other channel,
      then all the queues must be bound again explicitly to the new class,
      for the rate limit parameters on the other channel to take effect.
      
      So, always explicitly bind all queues to the port rate limit traffic
      class, regardless of the traffic management channel that it belongs
      to. Also, only bind queues to port rate limit traffic class, if all
      the queues don't already belong to an existing different traffic
      class.
      
      Fixes: 4ec4762d ("cxgb4: add TC-MATCHALL classifier egress offload")
      Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c856e2b6
  10. 18 12月, 2019 1 次提交
  11. 11 12月, 2019 1 次提交
  12. 23 11月, 2019 1 次提交
  13. 21 11月, 2019 2 次提交
    • R
      cxgb4: add TC-MATCHALL classifier ingress offload · 21c4c60b
      Rahul Lakkireddy 提交于
      Add TC-MATCHALL classifier ingress offload support. The same actions
      supported by existing TC-FLOWER offload can be applied to all incoming
      traffic on the underlying interface.
      
      Ensure the rule priority doesn't conflict with existing rules in the
      TCAM. Only 1 ingress matchall rule can be active at a time on the
      underlying interface.
      
      v5:
      - No change.
      
      v4:
      - Added check to ensure the matchall rule's prio doesn't conflict with
        other rules in TCAM.
      - Added logic to fill default mask for VIID, if none has been
        provided, to prevent conflict with duplicate VIID rules.
      - Used existing variables in private structure to fill VIID info,
        instead of extracting the info manually.
      
      v3:
      - No change.
      
      v2:
      - Removed logic to fetch free index from end of TCAM. Must maintain
        same ordering as in kernel.
      Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      21c4c60b
    • R
      cxgb4: add TC-MATCHALL classifier egress offload · 4ec4762d
      Rahul Lakkireddy 提交于
      Add TC-MATCHALL classifier offload with TC-POLICE action applied for
      all outgoing traffic on the underlying interface. Split flow block
      offload to support both egress and ingress classification.
      
      For example, to rate limit all outgoing traffic to 1 Gbps:
      
      $ tc qdisc add dev enp2s0f4 clsact
      $ tc filter add dev enp2s0f4 egress matchall skip_sw \
      	action police rate 1Gbit burst 8Kbit
      
      Note that skip_sw is important. Otherwise, both stack and hardware
      will end up doing policing. Policing can't be shared across flow
      blocks. Only 1 egress matchall rule can be active at a time on the
      underlying interface.
      
      v5:
      - No change.
      
      v4:
      - Removed check to reject police offload if prio is not 1.
      - Moved TC_SETUP_BLOCK code to separate function.
      
      v3:
      - Added check to reject police offload if prio is not 1.
      - Assign block_shared variable only for TC_SETUP_BLOCK.
      
      v2:
      - Added check to reject flow block sharing for policers.
      Signed-off-by: NRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4ec4762d
  14. 08 11月, 2019 4 次提交
  15. 06 11月, 2019 1 次提交
  16. 27 9月, 2019 1 次提交
  17. 11 8月, 2019 1 次提交
  18. 22 7月, 2019 1 次提交
  19. 10 7月, 2019 3 次提交
  20. 25 6月, 2019 3 次提交
  21. 11 6月, 2019 1 次提交
  22. 10 6月, 2019 1 次提交
  23. 23 5月, 2019 1 次提交
    • V
      cxgb4: Enable hash filter with offload · 74dd5aa1
      Vishal Kulkarni 提交于
      Hash (exact-match) filters used for offloading flows share the
      same active region resources on the chip with upper layer drivers,
      like iw_cxgb4, chcr, etc. Currently, only either Hash filters
      or ULDs can use the active region resources, but not both. Hence,
      use the new firmware configuration parameters (when available)
      to allow both the Hash filters and ULDs to share the
      active region simultaneously.
      Signed-off-by: NVishal Kulkarni <vishal@chelsio.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      74dd5aa1
  24. 08 5月, 2019 1 次提交
    • Y
      cxgb4: Fix error path in cxgb4_init_module · a3147770
      YueHaibing 提交于
      BUG: unable to handle kernel paging request at ffffffffa016a270
      PGD 3270067 P4D 3270067 PUD 3271063 PMD 230bbd067 PTE 0
      Oops: 0000 [#1
      CPU: 0 PID: 6134 Comm: modprobe Not tainted 5.1.0+ #33
      Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.9.3-0-ge2fc41e-prebuilt.qemu-project.org 04/01/2014
      RIP: 0010:atomic_notifier_chain_register+0x24/0x60
      Code: 1f 80 00 00 00 00 55 48 89 e5 41 54 49 89 f4 53 48 89 fb e8 ae b4 38 01 48 8b 53 38 48 8d 4b 38 48 85 d2 74 20 45 8b 44 24 10 <44> 3b 42 10 7e 08 eb 13 44 39 42 10 7c 0d 48 8d 4a 08 48 8b 52 08
      RSP: 0018:ffffc90000e2bc60 EFLAGS: 00010086
      RAX: 0000000000000292 RBX: ffffffff83467240 RCX: ffffffff83467278
      RDX: ffffffffa016a260 RSI: ffffffff83752140 RDI: ffffffff83467240
      RBP: ffffc90000e2bc70 R08: 0000000000000000 R09: 0000000000000001
      R10: 0000000000000000 R11: 00000000014fa61f R12: ffffffffa01c8260
      R13: ffff888231091e00 R14: 0000000000000000 R15: ffffc90000e2be78
      FS:  00007fbd8d7cd540(0000) GS:ffff888237a00000(0000) knlGS:0000000000000000
      CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      CR2: ffffffffa016a270 CR3: 000000022c7e3000 CR4: 00000000000006f0
      Call Trace:
       register_inet6addr_notifier+0x13/0x20
       cxgb4_init_module+0x6c/0x1000 [cxgb4
       ? 0xffffffffa01d7000
       do_one_initcall+0x6c/0x3cc
       ? do_init_module+0x22/0x1f1
       ? rcu_read_lock_sched_held+0x97/0xb0
       ? kmem_cache_alloc_trace+0x325/0x3b0
       do_init_module+0x5b/0x1f1
       load_module+0x1db1/0x2690
       ? m_show+0x1d0/0x1d0
       __do_sys_finit_module+0xc5/0xd0
       __x64_sys_finit_module+0x15/0x20
       do_syscall_64+0x6b/0x1d0
       entry_SYSCALL_64_after_hwframe+0x49/0xbe
      
      If pci_register_driver fails, register inet6addr_notifier is
      pointless. This patch fix the error path in cxgb4_init_module.
      
      Fixes: b5a02f50 ("cxgb4 : Update ipv6 address handling api")
      Signed-off-by: NYueHaibing <yuehaibing@huawei.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a3147770