- 22 7月, 2014 1 次提交
-
-
由 Nishanth Menon 提交于
DMA interrupts are now available in of, and the definitions are duplicates in hwmod. This prevents us from dynamically allocating interrupt resources for dma from devicetree. Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 15 5月, 2014 1 次提交
-
-
由 Roger Quadros 提交于
Add nodes for the Super Speed USB controllers, omap-control-usb, USB2 PHY and USB3 PHY devices. Remove ocp2scp1 address space from hwmod data as it is now provided via device tree. CC: Benoît Cousson <bcousson@baylibre.com> Reviewed-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 20 2月, 2014 1 次提交
-
-
由 Suman Anna 提交于
The spinlock module's SYSCONFIG register on DRA7xx does not support smart wakeup, and also does not have the CLKACTIVITY field. The sysc data for spinlock module has been appropriately fixed up to reflect the same. Cc: Ambresh K <ambresh@ti.com> Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
- 26 12月, 2013 1 次提交
-
-
由 Rajendra Nayak 提交于
With commit '7dedd346: ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL' we moved from parsing cmdline to identify uart used for earlycon to using the requsite hwmod CONFIG_DEBUG_OMAPxUARTy FLAGS. On DRA7 though, we seem to be missing this flag, and atleast on the DRA7 EVM where we use uart1 for console, boot fails with DEBUG_LL enabled. Reported-by: NLokesh Vutla <lokeshvutla@ti.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> # on a different base Signed-off-by: NRajendra Nayak <rnayak@ti.com> Fixes: 7dedd346 ("ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL") Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
- 23 8月, 2013 1 次提交
-
-
由 Ambresh K 提交于
Adding the hwmod data for DRA7XX platforms. Signed-off-by: NAmbresh K <ambresh@ti.com> Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-