- 20 2月, 2019 1 次提交
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由 Geert Uytterhoeven 提交于
Implement the irq_set_wake() method in the (optional) irq_chip of the GPIO expander, and propagate wake-up settings to the upstream interrupt controller. This allows GPIOs connected to a PCA953X GPIO expander to serve as wake-up sources. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: NNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 14 2月, 2019 1 次提交
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由 Thomas Petazzoni 提交于
The NXP PCAL6416, documented at [1], is a variant of the PCA GPIO expander with 16 GPIOs, and supporting an interrupt and the "extended" features for interrupt, pull-up/pull-down configuration, etc. [1] https://www.nxp.com/docs/en/data-sheet/PCAL6416A.pdfSigned-off-by: NThomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
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- 13 2月, 2019 1 次提交
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由 Thomas Petazzoni 提交于
This commit adds a minimal implementation of the ->set_config() hook, with support for the PIN_CONFIG_BIAS_PULL_UP and PIN_CONFIG_BIAS_PULL_DOWN configurations. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 1月, 2019 2 次提交
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由 Thomas Petazzoni 提交于
When a system has two PCA953x GPIO expanders, the kernel complains with: gpio gpiochip2: (0-0021): detected irqchip that is shared with multiple gpiochips: please fix the driver. Indeed, there is a single instance of "struct irq_chip" that gets re-used for both PCA953x instance. This commit moves the "struct irq_chip" to be part of the "struct pca953x_chip", so that we have one "struct irq_chip" per PCA953X instance. As part of this, the name of the irq_chip is also made different on a per-instance basis, now using the dev_name() of the I2C device. This changes what is visible in /proc/interrupts. Before: 47: 0 0 pca953x 10 Edge e0100000.sdhci cd 48: 0 0 pca953x 6 Edge e0101000.sdhci cd After: 47: 0 0 0-0020 10 Edge e0100000.sdhci cd 48: 2 0 0-0020 6 Edge e0101000.sdhci cd Signed-off-by: NThomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thomas Petazzoni 提交于
The current design of pca953x_irq_setup() is: if (all conditions to support IRQ are met) { lots of code to support IRQs, which goes to a serious indentation level. } return 0; It makes more sense to handle this like this: if (!all conditions to support IRQ are met) return 0; handle IRQ support This commit does just this change, reducing by one tab the indentation level of the IRQ setup code. Thanks to this reduced indentation level, we are less restricted by the 80-column limit, and we can have more function arguments on the same line. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 1月, 2019 1 次提交
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由 Wei Yongjun 提交于
Fixes the following sparse warning: drivers/gpio/gpio-pca953x.c:292:28: warning: symbol 'pca953x_i2c_regmap' was not declared. Should it be static? Fixes: 49427232 ("gpio: pca953x: Perform basic regmap conversion") Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 17 12月, 2018 1 次提交
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由 Linus Walleij 提交于
Instead of using the name directly from the I2C client to name the gpio_chip, use dev_name() on the client->dev, so we get the sometimes more unique device name, as I2C has a mechanism for naming its devices explicitly in e.g. board data. This is a prerequisite for being able to reference uniquely any I2C GPIO expander defined in a board file when setting up GPIO descriptor tables. Reviewed-by: NRobert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 14 12月, 2018 14 次提交
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由 Marek Vasut 提交于
It is possible that the PCA953x is powered down during suspend. Use regmap cache to assure the registers in the PCA953x are in line with the driver state after resume. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
Drop pca953x_write_single() which is used in one place. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
Replace the ad-hoc reg_output output register caching with generic regcache cache. Drop pca953x_write_single() which is no longer used. This reduces code duplication. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
Replace the ad-hoc reg_direction direction register caching with generic regcache cache. This reduces code duplication. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
Convert the driver to use regmap to access the chips. Due to the convoluted register mapping scheme, implement read/write/volatile check functions that untangle the mess and perform check accordingly. This patch does not zap the internal register cache of the PCA953x driver, nor does it push the regmap access down into the gpiochip accessors to simplify the review. All that is in subsequent patches. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
Instead of having the I2C register calculation function spread across multiple accessor functions, pull it out into a single function which returns the adjusted register address. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
The ad-hoc i2c block write can be replaced by standard register accessor function, which correctly handles all the chip details and differences. Do so to simplify the code. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
The PCA957x and PCA953x init functions are almost the same, except for the different register mapping and one extra write to BKEN register in case of PCA957x. Factor out the common code. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
At this point, the pca953x_{read,write}_regs_mul() can read single bank PCA953x GPIO chips as well. Merge the _8 and _mul functions together to simplify the code a bit. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
At this point, these two functions only differ in whether they do or do not set the address increment bit. The 16 GPIO case does not need to set the AI bit, except for PCA9575 on write, while the 24 GPIO and more case does set the AI bit always. Merge these two functions together to simplify the code a bit. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
At this point, these two functions only differ in whether they do or do not set the address increment bit on PCA9575. Merge these two functions together to simplify the code a bit. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
The multi-byte IO on various pca953x chips requires the auto-increment bit, while other chips toggle the LSbit automatically. Note that LSbit toggling only alternates between two registers during the IO, it is not the same as address auto-increment. The driver currently assumes that #gpios > 16 implies auto-increment, while #gpios <= 16 implies LSbit toggling. This is incorrect at there are chips with 16 GPIOs which require the auto-increment bit. The PCA9575, according to NXP datasheet rev. 4.2 from 16 April 2015, section 7.3 Command Register, the bit 7 in command register is the auto-increment bit, which allows programming multiple registers sequentially. Set this bit both in pca953x_gpio_set_multiple(), where it fixes the multi register programming, and in pca957x_write_regs_16(), where is simplifies the function. In fact, the pca957x_write_regs_16() now looks rather similar to pca953x_write_regs_24() and pca953x_write_regs_16(), which is intended for subsequent patches. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
The PCAL_PINCTRL_MASK is too large. The extended register block on PCAL6524, which is the largest chip with this block, has the block limited to address range 0x40..0x7f. This is because the bit 7 in the command register is used for the Address Increment functionality. Trim the mask to 0x60 to match the datasheet and to prevent accidental overwrite of the AI bit. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Marek Vasut 提交于
The bank_shift = fls(...) code was duplicated in the driver 5 times, pull it into separate function. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: NKieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 02 7月, 2018 1 次提交
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由 Baruch Siach 提交于
Don't warn about missing interrupts support when the parent interrupt is not defined. Enabling interrupts support would not make it work anyway. Signed-off-by: NBaruch Siach <baruch@tkos.co.il> Reviewed-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 24 5月, 2018 1 次提交
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由 Linus Walleij 提交于
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 5月, 2018 4 次提交
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由 H. Nikolaus Schaller 提交于
The register constants are so far defined in a way that they fit for the pcal9555a when shifted by the number of banks, i.e. are multiplied by 2 in the accessor function. Now, the pcal6524 has 3 banks which means the relative offset is multiplied by 4 for the standard registers. Simply applying the bit shift to the extended registers gives a wrong result, since the base offset is already included in the offset. Therefore, we have to add code to the 24 bit accessor functions that adjusts the register number for these exended registers. The formula finally used was developed and proposed by Andy Shevchenko <andy.shevchenko@gmail.com>. Suggested-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NH. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 H. Nikolaus Schaller 提交于
These mask bits are to be used to map the extended register addresses (which are defined for an unsupported 8-bit pcal chip) to 16 and 24 bit chips (pcal6524). Signed-off-by: NH. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 H. Nikolaus Schaller 提交于
The of_device_table is missing the PCA_PCAL flag so the pcal6524 would be operated in tca6424 compatibility mode which does not handle the new interrupt mask registers. Suggested-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NH. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Grigoryev Denis 提交于
The driver stores the result of irq_set_type() in the internal variables irq_trig_raise and irq_trig_fall, which later are used to determine the GPIOs that must be re-configured as input. These variables retain their value between gpiolib's export / unexport, resulting in an incorrect state in some cases. The corresponding bits in the variables irq_trig_raise and irq_trig_fall should be cleared in irq_shutdown(). Signed-off-by: NDenis Grigoryev <grigoryev@fastwel.ru> Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 16 5月, 2018 4 次提交
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由 H. Nikolaus Schaller 提交于
The pcal6524 has another set of registers to fine control the interrupt handling. Signed-off-by: NH. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 H. Nikolaus Schaller 提交于
PCAL chips ("L" seems to stand for "latched") have additional registers starting at address 0x40 to control the latches, interrupt mask, pull-up and pull down etc. Signed-off-by: NH. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 H. Nikolaus Schaller 提交于
which makes it easier to match them with the data sheets. Signed-off-by: NH. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
Use of_device_get_match_data() instead of open-coding it. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 27 3月, 2018 1 次提交
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由 H. Nikolaus Schaller 提交于
The Pyra-Handheld originally used the tca6424 but recently we have replaced it by the pin and package compatible pcal6524. So let's add this to the bindings and the driver. And while we are at it, the pcal9555a does not have a compatible entry either but is already supported by the device id table. Signed-off-by: NH. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 12月, 2017 1 次提交
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由 Sergei Shtylyov 提交于
Despite commit 55020c80 ("of: Add vendor prefix for ON Semiconductor Corp.") was made long ago, the latter commit 9f49f6dd ("gpio: pca953x: add onsemi,pca9654 id") made use of another, undocumented vendor prefix. Since such prefix doesn't seem to be used in any device trees, I think we can just fix the "compatible" string in the driver and the bindings and be done with that... Fixes: 9f49f6dd ("gpio: pca953x: add onsemi,pca9654 id") Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NRob Herring <robh@kernel.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 11月, 2017 1 次提交
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由 Thierry Reding 提交于
In order to consolidate the multiple ways to associate an IRQ chip with a GPIO chip, move more fields into the new struct gpio_irq_chip. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 14 8月, 2017 1 次提交
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由 Andy Shevchenko 提交于
i2c_smbus commands handle the correct byte order for smbus transactions internally. This will currently result in incorrect operation on big endian systems. Suggested-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 25 4月, 2017 1 次提交
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由 Anders Darander 提交于
The TCA9554 doesn't work with the pcf857x driver, trying to change the direction gives a NAK bailout error. TCA9554 is similar to the PCA9554, thus change the driver. Signed-off-by: NAnders Darander <anders@chargestorm.se> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 23 3月, 2017 3 次提交
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由 Andy Shevchenko 提交于
GPIO ACPI library is going to be stricter about resources, thus, expand comment regarding "reset" GPIO resource in this driver to clarify its usage in ACPI case. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andy Shevchenko 提交于
For sake of better maintenance sort the headers by alphabetical order. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Andy Shevchenko 提交于
Introduce ->get_direction() callback for the driver. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> [Removed use of GPIOF_DIR* flags] Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 11 1月, 2017 1 次提交
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由 Steve Longerbeam 提交于
Add optional reset-gpios pin control. If present, de-assert the specified reset gpio pin to bring the chip out of reset. v2: - Specify that reset signal to PCA953x chip is active low, in binding doc. - reorder includes in gpio-pca953x.c. - remove dev_err() on devm_gpiod_get_optional() error return. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-gpio@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com> Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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