- 11 1月, 2018 1 次提交
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由 Andy Shevchenko 提交于
On Intel Edison the Broadcom Wi-Fi card, which is connected to SDIO, requires 2.0v, while the host, according to Intel Merrifield TRM, supports 1.8v supply only. The card announces itself as mmc2: new ultra high speed DDR50 SDIO card at address 0001 Introduce a custom OCR mask for SDIO host controller on Intel Merrifield and add a special case to sdhci_set_power_noreg() to override 2.0v supply by enforcing 1.8v power choice. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 04 1月, 2018 1 次提交
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由 Atul Garg 提交于
The Arasan Controller is based on a FPGA platform and has integrated phy with specific registers used during initialization and management of different modes. The phy and the controller are integrated and registers are very specific to Arasan. Arasan being an IP provider, licenses these IPs to various companies for integration of IP in custom SOCs. The custom SOCs define own register map depending on how bits are tied inside the SOC for phy registers, depending on SOC memory plan and hence will require own platform drivers. If more details on phy registers are required, an interface document is hosted at https://arasan.com/NF/eMMC5.1 PHY Programming in Linux.pdf. Signed-off-by: NAtul Garg <agarg@arasan.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 11 12月, 2017 1 次提交
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由 Adrian Hunter 提交于
Add CQHCI initialization and implement CQHCI operations for Intel GLK. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLinus Walleij <linus.walleij@linaro.org>
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- 30 10月, 2017 2 次提交
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由 Adrian Hunter 提交于
We keep PCI Ids in sdhci-pci.h and the O2-specific definitions belong in sdhci-pci-o2micro.c. Move those definitions accordingly. Remove unused O2 definitions in sdhci-pci-core.c. The 3 o2micro external function declarations might as well be in sdhci-pci.h as well, so move them there and get rid of sdhci-pci-o2micro.h entirely. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Add PCI Id for Intel CDF. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 10 10月, 2017 1 次提交
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由 Adrian Hunter 提交于
The default for d3_retune is true, but that was not being set in all cases, which results in eMMC errors because re-tuning has not been done. Fix by initializing d3_retune to true. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Fixes: c959a6b0 ("mmc: sdhci-pci: Don't re-tune with runtime pm for some Intel devices") Cc: stable@vger.kernel.org # v4.12+ Reported-and-tested-by: Nojab <ojab@ojab.ru> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 22 9月, 2017 1 次提交
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由 Adrian Hunter 提交于
Some Intel host controllers (e.g. CNP) use an ACPI device-specific method to ensure correct voltage switching. Fix voltage switch for those, by adding a call to the DSM. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 30 8月, 2017 2 次提交
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由 Michał Mirosław 提交于
Now that sdhci_set_bus_width() supports 8-bit bus widths based on the MMC_CAP_8_BIT_DATA capability flag, replace the sdhci-pci version with the generic sdhci version. Signed-off-by: NMichał Mirosław <mirq-linux@rere.qmqm.pl> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andy Shevchenko 提交于
Fix up a power state in case PCI device has an ACPI companion. Do it only for Intel Merrifield for now. This is almost copy'n'paste of part of sdhci_acpi_probe() and might be split out to a helper function in the future. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 20 6月, 2017 5 次提交
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由 Adrian Hunter 提交于
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Ulf Hansson 提交于
The MMC_CAP2_HC_ERASE_SZ is used only by a few mmc host drivers. Its intent is to enable eMMC's high-capacity erase size, as to improve the behaviour of the erase operations. We should strive to avoid software configuration options that aren't necessary, but instead deploy common behaviours. For these reasons, let's remove the capability bit for MMC_CAP2_HC_ERASE_SZ and make it the default behaviour. Note that this change doesn't affect eMMCs supporting trim/discard, because these commands operates on sectors and takes precedence over erase commands. Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com> Tested-by: NShawn Lin <shawn.lin@rock-chips.com>
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由 Adrian Hunter 提交于
Add PCI ids and enhanced strobe support for Intel CNP. This is combined with GLK due to the pending CMDQ support which they both share. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Matthias Kraemer 提交于
This patch applies customized PCI_DEVICE_ macros to specify the pci_ids instead of open-coding them within the sdhci-pci driver. By introducing device specific macros the pci_ids table becomes much shorter and easier to comprehend than it would be possible using the generic version of the PCI_DEVICE_ macros. Signed-off-by: NMatthias Kraemer <matthiasmartinsson@gmail.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Colin Ian King 提交于
The guid intel_dsm_guid does not need to be in global scope, so make it static. Signed-off-by: NColin Ian King <colin.king@canonical.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Acked-by: NUlf Hansson <ulf.hansson@linaro.org> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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- 07 6月, 2017 1 次提交
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由 Andy Shevchenko 提交于
acpi_evaluate_dsm() and friends take a pointer to a raw buffer of 16 bytes. Instead we convert them to use guid_t type. At the same time we convert current users. acpi_str_to_uuid() becomes useless after the conversion and it's safe to get rid of it. Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Borislav Petkov <bp@suse.de> Acked-by: NDan Williams <dan.j.williams@intel.com> Cc: Amir Goldstein <amir73il@gmail.com> Reviewed-by: NJarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Reviewed-by: NJani Nikula <jani.nikula@intel.com> Acked-by: NJani Nikula <jani.nikula@intel.com> Cc: Ben Skeggs <bskeggs@redhat.com> Acked-by: NBenjamin Tissoires <benjamin.tissoires@redhat.com> Acked-by: NJoerg Roedel <jroedel@suse.de> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Cc: Yisen Zhuang <yisen.zhuang@huawei.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NFelipe Balbi <felipe.balbi@linux.intel.com> Acked-by: NMathias Nyman <mathias.nyman@linux.intel.com> Reviewed-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: NMark Brown <broonie@kernel.org> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NChristoph Hellwig <hch@lst.de>
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- 25 4月, 2017 14 次提交
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由 Adrian Hunter 提交于
The DSM used by some Intel controllers can return a 3 byte package. Allow for that by using memcpy to copy the bytes. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Azhar Shaikh 提交于
Set MMC_CAP_AGGRESSIVE_PM for BYT-related Intel SD card controllers. Signed-off-by: NAzhar Shaikh <azhar.shaikh@intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Move a function to avoid having to forward declare it in a subsequent patch. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
Add runtime suspend/resume callbacks to match suspend/resume callbacks. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
The suspend / resume callbacks lack the flexibility to allow a device to specify a different function entirely. Change them around so that device functions are called directly and they in turn can call the default implementations if needed. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
It is confusing to have some parts of suspend / resume under conditional compilation and some parts not. Use conditional compilation everywhere. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
Do not use suspend/resume callbacks with runtime pm. It doesn't make sense and isn't being used, so remove. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
SDHCI provides more flexibility than simply calling sdhci_add_host(). Make that available by allowing devices to specify their own ->add_host() function. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
The spin lock is not necessary in set_ios. Anything that is racing with changes to the I/O state is already broken. The mmc core already provides synchronization via "claiming" the host. So remove spin_lock and friends from sdhci_set_ios and related callbacks. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
Drivers can use the host operation directly, so remove this now unused callback. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
Make use of an Intel ACPI _DSM that provides eMMC driver strength. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
Make use of an Intel ACPI _DSM that indicates if re-tuning is needed after D3. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
Let devices define their own private data to facilitate device-specific operations. The size of the private structure is specified in the sdhci_pci_fixes structure, then sdhci_pci_probe_slot() will allocate extra space for it, and sdhci_pci_priv() can be used to get a reference to it. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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由 Adrian Hunter 提交于
Devices might save and restore tuning values so that re-tuning might not be needed after a pm transition. Let drivers decide by pushing the mmc_retune_needed() logic down to them. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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- 23 3月, 2017 1 次提交
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由 Adrian Hunter 提交于
Disabling interrupts for even a millisecond can cause problems for some devices. That can happen when Intel host controllers wait for the present state to propagate. The spin lock is not necessary here. Anything that is racing with changes to the I/O state is already broken. The mmc core already provides synchronization via "claiming" the host. Although the spin lock probably should be removed from the code paths that lead to this point, such a patch would touch too much code to be suitable for stable trees. Consequently, for this patch, just drop the spin lock while waiting. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org # v4.9+ Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org> Tested-by: NLudovic Desroches <ludovic.desroches@microchip.com>
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- 13 2月, 2017 2 次提交
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由 Shyam Sundar S K 提交于
This patch adds support for HS200 tuning mode on AMD eMMC-4.5.1 Reviewed-by: NSen, Pankaj <Pankaj.Sen@amd.com> Reviewed-by: NShah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com> Reviewed-by: NAgrawal, Nitesh-kumar <Nitesh-kumar.Agrawal@amd.com> Signed-off-by: NS-k, Shyam-sundar <Shyam-sundar.S-k@amd.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andy Shevchenko 提交于
cd_con_id is not used and always NULL. Remove it to make code a bit more cleaner. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 05 12月, 2016 2 次提交
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由 Zach Brown 提交于
On NI 9037 boards the max SDIO frequency is limited by trace lengths and other layout choices. The max SDIO frequency is stored in an ACPI table. The driver reads the ACPI entry MXFQ during sdio_probe_slot and sets the f_max field of the host. Signed-off-by: NNathan Sullivan <nathan.sullivan@ni.com> Reviewed-by: NJaeden Amero <jaeden.amero@ni.com> Reviewed-by: NJosh Cartwright <joshc@ni.com> Signed-off-by: NZach Brown <zach.brown@ni.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Zach Brown 提交于
Add PCI ID for Intel byt sdio host controller sub-vended by NI. The controller has different behavior because of the board layout NI puts it on. Signed-off-by: NZach Brown <zach.brown@ni.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 29 11月, 2016 2 次提交
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由 David E. Box 提交于
With commit f35bbf61 ("gpio / ACPI: Return -EPROBE_DEFER if the gpiochip was not found"), a gpio descriptor request can now be deferred if the providing gpio host controller driver hasn't been loaded yet. Allow use in mmc slot probe in order to prevent card detect gpio setup from failing in this case. Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Add support for eMMC/SD/SDIO Intel GLK host controllers. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 10 10月, 2016 2 次提交
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由 Adrian Hunter 提交于
Some Intel controllers (e.g. BXT) might fail to set bus power after a D3 -> D0 transition due to the present state not yet having propagated. Retry for up to 2 milliseconds. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Adrian Hunter 提交于
Let devices define their own sdhci_ops so that device-specific variations can be implemented without adding quirks. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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- 27 9月, 2016 2 次提交
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由 Adrian Hunter 提交于
Set MMC_CAP_CMD_DURING_TFR for Intel BYT and related eMMC host controllers. Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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由 Andy Shevchenko 提交于
Intel Merrifield provides an interface to an external SD card. Enable it here. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: NAdrian Hunter <adrian.hunter@intel.com> Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
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