1. 02 1月, 2010 3 次提交
    • M
      sh: Move page table allocation out of line · 2a5eacca
      Matt Fleming 提交于
      We also switched away from quicklists and instead moved to slab
      caches. After benchmarking both implementations the difference is
      negligible. The slab caches suit us better though because the size of a
      pgd table is just 4 entries when we're using a 3-level page table layout
      and quicklists always deal with pages.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      2a5eacca
    • M
      sh: Optimise flush_dcache_page() on SH4 · b4c89276
      Matt Fleming 提交于
      If the page is not mapped into any process's address space then aliases
      cannot exist in the cache. So reduce the amount of flushing we perform.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      b4c89276
    • M
      sh: Correct the PTRS_PER_PMD and PMD_SHIFT values · 3f5ab768
      Matt Fleming 提交于
      The previous expressions were wrong which made free_pmd_range() explode
      when using anything other than 4KB pages (which is why 8KB and 64KB
      pages were disabled with the 3-level page table layout).
      
      The problem was that pmd_offset() was returning an index of non-zero
      when it should have been returning 0. This non-zero offset was used to
      calculate the address of the pmd table to free in free_pmd_range(),
      which ended up trying to free an object that was not aligned on a page
      boundary.
      
      Now 3-level page tables should work with 4KB, 8KB and 64KB pages.
      Signed-off-by: NMatt Fleming <matt@console-pimps.org>
      3f5ab768
  2. 31 12月, 2009 1 次提交
  3. 24 12月, 2009 36 次提交